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TC55V1664BFT-10 |TC55V1664BFT10TOSHN/a50avaiMOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 65,536-WORD BY 16 BIT CMOS STATIC RAM
TC55V1664BFT-10 |TC55V1664BFT10TOSHIBAN/a1760avaiMOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 65,536-WORD BY 16 BIT CMOS STATIC RAM
TC55V1664BJ-10 |TC55V1664BJ10TOSHIBAN/a1400avaiMOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 65,536-WORD BY 16 BIT CMOS STATIC RAM
TC55V1664BJ-12 |TC55V1664BJ12TOSHIBAN/a1400avaiMOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 65,536-WORD BY 16 BIT CMOS STATIC RAM
TC55V1664BJ-12 |TC55V1664BJ12TOSN/a45avaiMOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 65,536-WORD BY 16 BIT CMOS STATIC RAM


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TC55V1664BFT-10-TC55V1664BJ-10-TC55V1664BJ-12
65,536-WORD BY 16-BIT CMOS STATIC RAM
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
65,536-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
The TC55V1664BJ/BFT is a 1,048,576 bits high speed static random access memory organized as
65,536 words by 16 bits using CMOS technology, and operated from a single 3.3V supply. Toshiba's
CMOS technology and advanced circuit form provide high speed feature.
The TC55V1664BJ/BFT has low power feature with device control using chip enable (CE), and has
output enable(0'Til') for fast memory access. Also it allows lower and upper byte access by data byte
control (YEW). The TC55V1664BJ/BFT is suitable for use in cache memory where high speed is
required, and high speed strage. All inputs and outputs are directly LVTTL compatible.
The TC55V1664BJ/BFT is packaged in 44-pin plastic SOJ and TSOP with 400 mil width for high
density surface assembly.
FEATURES
0 Fast access time : 0 3.3V single power supply l 3.3Vi0.3V
TC55V1664BJ/BFT-10 10ns(MAX) 0 Fully static operation
TC55V1664BJ/BFT-12 12ns(MAX) 0 All Inputs and Outputs : LVTTL compatible
TC55V1664BJ/BFT-15 15ns(MAX) 0 Output buffer control : t5rt"
0 Low power dissipation 0 DatiLbyte control -._.r.._
Cycle Time 10 12 15 20 ns LB (1/01 to U08), UB (I/O9 to 1/016)
Operation (MAX) 230 190 170 150 mA dt ngigffp 400 1 27 (BJ) (W . ht 1 64 T )
.' 2rnAfMAX - -=. eyr,nyl"y.yrmhyp
Standby ( ) TSOPH 44-P-400-0.80 (BFT) (Weight:0.45gmTyp)
PIN CONNECTION PIN NAMES
TC55V1664BJ TC55V1664BFT A0 to A15 Address Inputs
A4 E 1 A5 A4 = f' 44 = A5 l/OI 111/016 Data Inputs/Outputs
A3 E 2 A6 tl I: g fd = 2; CE Chip Enable Input
I: = - .
ti E i % A1 1: 4 41 :1 E VE Write Enable Input
i & l: 5 40 = g3 OE Output Enable Input
A_0 E 5 9 CE = 6 39 = LB - -
CE E 6 LB l/OI 1: 7 38 = l/O16 LB, UB Data Byte Control Inputs
I/OI c: 7 I/O16 1/02 I: 8 E 37 = 1/015 VDD Power(+3.3V)
l/O2 E 8 fi? I/O15 1/03 = 9 m 36 :11/014 GND G d
1/03 E 9 LU 1/014 1/04 I: 10 - 35 = 1/013 roun
I/O4 E 10 . I/O13 GVDD I: 1; > 3131 = GND N.C. No Connection
v E 11 GND ND 1: 1 = v
G158 L 12 a. VDD l/O5 I: 13 g 32 = 1/8'12 NAI. Not Usable(Input)
1/05 L 13 0 1/012 V05: 14 F- 31 = l/O11
V06 L14 F- V011 1/07 :15 v 30 = 1/010
l/O? E 15 V 1/010 I/Ci= 16 29 :11/09
WE 1: 17 28 :1 N.U.
I/ti1ti 1/09 A15E18 27 2A8
WE E 17 N.U. A14 1:19 26 = A9
A15E18 A8 A13|=20 25 =IA10
A14: 19 A9 A121:21 24 =IA11
A13 E 20 A10 N.C. E 22 23 :1 N.C.
A12 E 21 All
N.C. E 22 N.C.
(SOJ) (TSOP)
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1998-06-17 1/10
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
BLOCK DIAGRAM
m v'.',',: H VDD
Se,' Q MEMORY
ecu. go
tgy, 8Y, CELL ARRAY l GND
re512x 128x 16
l/Ol (1,048,576)
IIOZ a:
1/03 CE I- ttt
I/O4 'it? g E tl
K82 E g < 'G y,
l/O? Cl 0 al
I/O9 SENSE AMP.
l/O11 I- 5 S 5i
I/O12 D u, , E I-
(2e g 'A COLUMN < D D
l/O15 - m DECODER Cl O m
COLUMN
ADDRESS BU FFER
GENERATOR A5 A7 A9 All
A6 A8 A10
9| 5| E! 2‘
MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.5 to 4.6 V
VlN Input Terminal Voltage - 0.5 * to 4.6 V
VI/o Input/Output Terminal Voltage - 0.5 * to VDD + 0.5** V
Po Power Dissipation 0.95 W
Tsolder Soldering Temperature (10s) 260 ''C
Tstrg Storage Temperature - 65 to 150 'C
Topr Operating Temperature - 10 to 85 ''C
* : -1.5V with a pulse width of 20%.tRC min(4ns max)
** : VDD+1.5V with a pulse width of 20%.tRC min(4ns max)
1998-06-17 2/10
TOSHIBA
TC55V1664BJ/BFT-10,-12,-15
DC RECOMMENDED OPERATING CONDITIONS (Ta=0° to 70°C)
** : VDD+1.0V wit
DC and OPERATING CHARACTERISTICS (Ta = ty' to 70°C, VDD = 3.3V l 0.3V)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDD Power Supply Voltage 3.0 3.3 3.6 V
" Input High Voltage 2.0 - VDD+0.3** V
" Input Low Voltage -0.3 * - 0.8 V
* : -1.OV with a ulse width of 20%.tRC min(4ns max)
a pulse width of 20% . tRC min (4ns max)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
I Input Leakage Current V 0 t V 1 1 A
IL (Except NU pin) IN _ o DD - - #
k E=V|H or m=V|L or Oi-ve
ILO Output Lea age Current VOUT=0 to VDD -1 - 1 ,A
I Input Current VIN = 0 to 0.8V - 1 - 20 A
I(NU) (NU pin) v.N=0 to 0.2V -1 - 1 ’1
. lor, = - 2mA 2.4 - -
VOH Output High Voltage
IOH= -100/zA VDo-0Q - - v
IOL = 2mA - - 0.4
VOL Output Low Voltage
IOL = 100pA - - 0.2
tcycle =10ns - - 230
E: VILI lout = 0mA tcycle =12ns - - 190
IDDO Operating Current mA
Other lnputs=NhH/1hL tcycle=15ns - - 170
tcycle = 20ns - - 150
IDDS‘I ci-ve, Other Inputs=NhH/NhL - - 20
Standby Current E: VDD - 0.2V mA
IDDS 2 - - 2
Other Inputs = VDD - 0.2V or 0.2V
CAPACITANCE (Ta = 25°C, f = 1.0MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance V|N=GND 6 pF
Cvo Input/Output Capacitance VI/O = GND 8 pF
NOTE 2 This parameter is periodically sampled and is not 100% tested.
1998-06-17 3/10
TOSHIBA
OPERATING MODE
TC55V1664BJ/BFT-10,-12,-15
MODE tTi? ?TE 'flirt'' 'LI)'"" Trg- I/OI to I/O8 l/O9 to I/O16 POWER
L L Output Output IDDO
Read L L H H L High Impedance Output IDDO
L H Output High Impedance IDDO
L L Input Input IDDO
Write L X L H L High Impedance Input IDDO
L H Input High Impedance IDDO
L H H X X
Outputs Disable High Impedance High Impedance IDDO
L X X H H
Standby H X X X X High Impedance High Impedance IDDS
X:HorL
NOTE : N.U. pin must be kept open electrically or pulled down to GND level or less than 0.8V.
Applying a voltage more than 0.8V to N.U. pin is prohibited.
1998-06-17 4/10
TOSHIBA
TC55V1664BJ/BFT-10,-12,-15
AC CHARACTERISTICS (Ta = 0° to 70°C (1), VDD = 3.3V i 0.3V)
READ CYCLE
SYMBOL PARAMETER TC55V1664BJ/BFT-10 TC55V1664BJ/BFT-12 TC55V1664BJ/BFT-15 UNIT
MIN MAX MIN MAX MIN MAX
tRC Read Cycle Time 10 - 12 - 15 -
tACC Address Access Time - 10 - 12 - 15
tco E Access Time - 10 - 12 - 15
tos w Access Time - 5 - 6 - 8
tsa -OTi, cg- Access Time - 5 - 6 - 8
tOH Output Data Hold Time from Address Change 3 - 3 - 3 -
tCOE Output Enable Time from E 3 - 3 - 3 - ns
toss Output Enable Time from E 1 - 1 - 1 -
tBE Output Enable Time from W, CB 1 - 1 - 1 -
tcoo Output Disable Time from CE - 6 - 7 - 8
tooo Output Disable Time from to-E - 6 - 7 - 8
tap Output Disable Time from -0Ti, CE - 6 - 7 - 8
WRITE CYCLE
TC55V1664BJ/BFT-1O TC55V1664BJ/BFT-12 TC55V1664BJ/BFT-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX MIN MAX
twc Write Cycle Time 10 - 12 - 15 -
twp Write Pulse Width 7 - 8 - 9 -
tcw Chip Enable to End of Write 8 - 8 - 12 -
th W, E Enable to End of Write 8 - 8 - 11 -
tAw Address Valid to End of Write 8 - 8 - 11 -
tAs Address Set Up Time 0 - 0 - 0 - ns
tWR Write Recovery Time 0 - 0 - 0 -
tog Data Set Up Time 6 - 7 - 8 -
tDH Data Hold Time 0 - 0 - 0 -
tOEW Output Enable Time from W 1 - 1 - 1 -
toow Output Disable Time from Wr - 6 - 7 - 8
AC TEST CONDITIONS Lig._1 3 V
Input Pulse Level 3.0V/0.0V
Input Pulse Rise and Fall Time 2ns 12000
. . l/Opin
Input Timing Measurement ISV
Reference Level CL = 5pF 8700
Output Timing Measurement 1.5V J
Reference Level (For tcos, tom tBE, tcoo,
Output Load Fig. 1 tiso, tooo, tow and toow)
1998-06-17 5/10
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
TIMING WAVEFORMS
READ CYCLE (2)
ADDRESS
tCOD (6)
tooo (6)
tBD (6)
Dout VALID DATA OUT
WRITE CYCLE 1 (5) CIT/tf Controlled)
ADDRESS X X
tas ’ twp - tWR
iji7't' k \x i!
CE "N 2%
W, LE "As, A"
tODW (6) tosw 6)
High Impedance
Dout (3) (4)
I tos toc
Din X VALID DATA IN X
1998-06-17 6/10
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
WRITE CYCLE 2 (5) (CE- Controlled)
ADDRESS X X
tas twp tWR
WE _ y'"
- —§ 'RN l
E te, R ,
mm ptr"
tCOEm cow 6 Hi h I d
Dout 1g mpe ance
tos tDH
Din VALID DATA IN
WRITE CYCLE 3 (5) (W, E Controlled)
ADDRESS
High Im ance
tos tDH
Din VALID DATA IN
1998-06-17 7/10
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
NOTE :
1. The operating temperature (Ta) is guaranteed with transverse air flow exceeding 400 linear
feet per minute.
2. W is High for Read Cycle.
3. Assuming that tTE" Low transition occurs coincident with or after ITrtTLow transition, Outputs
remain in a high impedance state.
4. Assuming that CE High transition occurs coincident with or prior tTf1ir High transition,
Outputs remain in a high impedance state.
5. Assuming that "0'T't" is High for Write Cycle, Outputs are in a high impedance state during this
period.
6. These parameters are specified as follows and measured by using the load shown in Fig. I.
(A) tCOE, tOEE, tBE, tOEW ...... Output Enable Time
(B) 13001), tODO, tBD, tODW ...... Output Disable Time
w, m rr
(A) (B)
_-- ---
. _t 0.2V
High Impedance i0.2V High Impedance
DOUT -, VALID DATA OUT -
0.2V ' 0.2V
UNKNOWN ' UNKNOWN ,
1998-06-17 8/10
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
PACKAGE DIMENSIONS
Plastic SOJ (SOJ44-P-400-1.27)
Unit in mm
f-lf-ll-ll-lr].?-])-"]?"-],-])'-]::!-]'-]:'-];-;'-;;-;;-;
11.05i0.12
I-Jr-JL-dl-JI-ICICI/lr-jr-jr-Ut-JCI-tut-ici-tut-gt-ii-J
EROMAX
28.58Hh12
Weight : 1.64g (Typ)
1998-06-17 9/10
TOSHIBA TC55V1664BJ/BFT-10,-12,-15
PAC KAGE DIM ENSIONS
Plastic TSOP (TSOPII 44-P-400-0.80)
Unit in mm
HHRHHHHHHRHHHHHHHHHHRH
_'"r1"""''"1),1b,i,,' -
l 1 22
0.805TYP 0.3H).05
- {E 0.13:3
1 18.81MAX
I 18.41i0.1 iii; g i'i
l “ ,d 'e
01:0 05
0.5i0.1
Weight : 0.45g (Typ)
1998-06-1 7 10/10

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