TC55V1001FI-10L ,131,072-WORD BY 8-BIT STATIC RAMfeatures using CEI and CE2 CE2 Access Time 85ns 100ns0 Data retention sunnlv vnlta ire of 2 to 3. 6 ..
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TC55V1001FI-10L-TC55V1001FI-85L
131,072-WORD BY 8-BIT STATIC RAM
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
131,072-WORD BY 8-BIT STATIC RAM
DESCRIPTION
The TC55V1001FI/FTI/TRI/STI/SRI is a 1,048,576-bit static random access memory (SRAM) or anized as
131,072 words by 8 bits. Fabricated using Toshiba's CMOS Silicon ate process technologl , t is device
operates from a single 2.7 to 3.6 V power su 1y. Advanced circuit tee nology provides both igh speed and
low power at an operating current of 3 mA/BX z (typ) and a minimum cycle time of 85 us. It is automatically
placed in low-power mode at 0.5 PA standby current (VDD = 3V, Ta = 25°C) when chip enable (CE1) is asserted
high or (CE2) is asserted low. There are three_epptrol in uts. CE1 and CE2 are used to select the device and for
data retention control, and output enable (OE) provi es fast memory access. This device is well suited to
various microprocessor system applications where high speed, low power and battery backup are required.
And, with a guaranteed operating range of - 40° to 85°C, the TC55V1001FI/FTI/TRI/STI/SRI can be used in
environments exhibiting extreme temperature conditions. The TC55V1001FI/FTI/TRI/STI/SRI is available in
a plastic 32-pin small-outline package (SOP) and normal and reverse pinout plastic 32-pin thin-small-outline
package (TSOP).
FEATURES
0 Low-power dissipation 0 Access Times(maximum):
Operating : 10.8 mW/MHz(typica1) 2.7 to 3.6V
0 Standby current of 0.9/1A (maximum) at -85L - 10L
Ta=25°C Access Time 85ns 100ns
0 Single power supply voltage of 2.7 to 3.6V E Access Time 85ns 100ns
0 Power down features using CE1 and CE2 CE2 Access Time 85ns 100ns
0 Data retention supply voltage of 2 to 3.6V E Access Time 45ns 50ns
0 Direct TTL compatibility for all inputs tt Packages:
and outputs SOP32-P-525-1.27 (FI) (Weight: 1.04 gtyp)
0 Wide operating temperature range of TSOP I 32-P-0820-0.50 (FTI) (Weight: 0.34 g typ)
-40° to 85°C TSOP I 32-P-0820-0.50A (TRI) (Weight: 0.34 g typ)
TSOP T 32-P-0.50 (STI) (Weight: 0.24 g typ)
TSOP I 32-P-0.50A (SR1) (Weight: 0.24 g typ)
PIN ASSIGNMENT (TOP VIEW)
0 32 PIN SOP o 32 PIN TSOP
NC I: 1 V 323 V (Normalpinout) (Reverse pinout)
A16 1: 2 31 El Alig
A14 1: 3 30:1 CE2
A12 I: 4 29E R/W
A7 E 5 28:1 A13
A6 E 6 273 A8
A5 1: 7 26:| A9
A4 E 8 253 L11
A3 C 9 24:I OE
A2 1: 10 233 A_lll
A1 E 11 22:1 CE1
A0 C 12 213 1/08
l/OI I: 13 203 I/O?
I/O2 = 14 12a 1182
38% E 12 17 1/04
PIN NAMES
A0t0A16 Address inputs Pin No. 1 2 3 4 5 6 7 8 9 IO 11 12 13 14 15 16
R’_W Read/Write Control Pin Name A11 A9 A8 A13 R/W CE2 A15 VDD N.C. A15 A14 A12 A7 As As A4
OE Output Enable .
ELEZ Chip Enable Pin No. 17 18 19 20 21 22 23 24 25 26 27 28 29 2 31 3
1/01 to |/08 Data Input/Output Pin Name A3 A2 A, Ao I/OI I/O2 I/O3 GND I/O4 I/OS l/O6 1/07 1/08 CE1 A10 OE
VDD Power
GND Ground
NC No Connection
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1997-08-18 1/13
TOSHIBA
TC55V1001Fl/FTl/TRl/STl/SRI-85L,-10L
BLOCK DIAGRAM
--o Voo
A-o GND
MEMORY CELL
1024 x 128 X 8
(1048576)
ROW ADDRESS
BUFFER
ROW ADDRESS
REGISTER
ROW ADDRESS
DECODER
mthN—hOhD
I/ Ol SENSE AMP
COLUMN ADDRESS
t COLUMN ADDRESS
l/O8 'ell
A0 A1A2 A3 A4 A5 A6
OPERATION MODE
Output Deselect H
Standby
l/OI to l/O8
High-Z
High-Z
Hi h-Z
Note: x =don't care. H=logic high. L=logic low.
ABSOLUTE MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.3 to 4.6 V
" Input Voltage - 0.3* to 4.6 V
VI/o Input/Output Voltage -0.5 to VDD + 0.5 V
PD Power Dissipation 0.8 W
Tsolder Soldering Temperature(10s) 260 ''C
Tstrg. Storage Temperature - 55 to 150 ''C
Topr. Operating Temperature - 40 to 85 ''C
* -3.0V when measured at a pulse width of 50 ns
1997-08-18 2/13
TOSHIBA
TC55V1001Fl/FTl/TRl/STl/SRI-85L,-10L
DC RECOMMENDED OPERATING CONDITIONS (Ta: -400 to 85°C)
2.7 to 3.6V
MIN TYP
-0.3* -
SYMBOL PARAMETER
Power Supply Voltage
VIH Input High Voltage
VI In 0.6
Low Vol
V Data Retention Su Volta
Yoo + 0.3
* -3.0V when measured at a pulse width of 50 ns
DC CHARACTERISTICS (Ta = -400 to 85°C, VDD-- 2.7 to 3.6V)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
In. Input Leakage Current " = Oto VDD - - i 1.0 #A
IOH Output High Current V0H = l/Dry-OSI/ -0.5 - - mA
IOL Output Low Current VOL = 0.4V 2.1 - - mA
lLo Output Leakage Current $1:er 3;:35: :tVollVg; MN = " or - - t 1.0 ”A
- VDD Min - - 35
CE1 = Ihr. and CE2 = " and =3v:10% Tcycle 1se; - - 10
I = V I = mA
DDOI 'l,:? JC',, O=UII|H IOVIL VDD Tcycle Min - - 40
. =3.3v1o.3v 1,15 - - 12
Operating Current m: 0.2V and VDD Tcycle Min - - 30 mA
CE2=VDD-0.2V =3Vi10% 1/15 - - 5
boo2 MN = Vrrc)-0.2V, IOUT = 0mA VDD Min - - 35
Other Inputs = Voo- 0.2V / 0.2V = 3.3V i 0.3V Tcycle les - - 6
lDDs1 ? = Ihr, or CE2 = " - - 2 mA
Van Ta = 25°C - 0.5 0.7
= 3V , 10% Ta = -4ty' to 85°C - - 25
Standby Current m = VDD-0.2V VDD Ta = 25°C - 0.7 os
loos; (1) or CE2 = 0.2V = 3.3V i 0.3V Ta =-4(Y' to 85°C - - 30 #A
I/oo = 2.0to 3.61/ Ta=25°C - - 0.5
VDD = 3.0V Ta = -40" to 40°C - - 2
Ta = -400 to 85°C - - 20
Note:1n standby mode with CE1 E VDD-0.2 V, these limits are assured for the
VDD-0.2V or CE2 E 0.2 V.
CAPACITANCE (Ta = 25°C, f = 1MHz)
condition CE2 2
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance " = GND 10 F
Com Output Capacitance VOUT = GND 10
Note: This parameter is periodically sampled and is not 100% tested.
1997-08-18 3/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = - 40° to 85°C, VDD = 2.7 to 3.6V)
READ CYCLE
TC55V1001Fl/FTl/TRl/STl/SRI
SYMBOL PARAMETER - 85L -1OL UNIT
MIN MAX MIN MAX
tRc Read Cycle Time 85 - 100 -
tacc Address Access Time - 85 - 100
tco1 Chip Enable(m) Access Time - 85 - 100
tcoz Chip Enable(CE2) Access Time - 85 - 100
tOE Output Enable Access Time - 45 - 50
tCOE Chip Enable Low to Output Active 5 - 5 - ns
tOEE Output Enable Low to Output Active 0 - 0 -
too Chip Enable High to Output High-Z - 30 - 35
tooo Output Enable High to Output High-Z - 30 - 35
tOH Output Data Hold Time 10 - 10 -
WRITE CYCLE
TC55V1001Fl/FTl/TRl/STl/SRI
SYMBOL PARAMETER - 85L - 10L UNIT
MIN MAX MIN MAX
twc Write Cycle Time 85 - 100 -
twp Write Pulse Width 60 - 60 -
tcw Chip Enable to End of Write 75 - 80 -
tas Address Set up Time 0 - 0 -
tum Write Recovery Time 0 - 0 - ns
tODW RNV Low to Output High-Z - 30 - 35
toaw R/W High to Output Active 0 - 0 -
tog Data Set up Time 35 - 40 -
tDH Data Hold Time 0 - 0 -
A.C. TEST CONDITIONS
Output load: 100 pF + one TTL gate
Input pulse level: 0.4 V, 2.4 V
Timing measurements: 1.5 V
Reference level: 1.5 V
tR, W: 5 ns
1997-08-18 4/13
TOSHIBA
TIMING DIAGRAMS
TC55V1001Fl/FTl/TRl/STl/SRI-85L,-10L
READ CYCLE (See Note 1)
ADDRESS X
tacc Jor-i
CE2 / tcoz ,
_ tco1 '
CEI /%A y
tOE tOD
toss tong
Dom t VALID DATA OUT
WRITE CYCLE 1 (R/W CONTROLLED) (See Note 4)
ADDRESS
A tum tWR
W flax /
A tcw AF'"
tcw P"
tii) /
toow toew
(See Note 2) (See Note 3)
tos tDH
(See Note 5)
VALID DATA IN
(See Note 5)
1997-08-18 5/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
WRITE CYCLE 2 (CEl CONTROLLED) (See Note 4)
ADDRESS X X
twe tWR
CE2 /// tcw NF"
tCOE A tODW
tos tDH
DIN (See Note 5) VALID DATA IN (See Note 5)
WRITE CYCLE 3 (CE2 CONTROLLED) (See Note 4)
ADDRESS X X
AS twe tWR
MN % y
CE2 " s' tcw "t
C? % /
tcos tODW
tos tDH
DIN (See Note 5) VALID DATA IN (See Note 5)
1997-08-18 6/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
Note .'
(1) R/W remains HIGH for the read cycle.
(2) If CEI goes LOW(or CE2 goes HIGH) coincident with or after R/W goes LOW, the outputs will
remain at high impedance.
(3) If CE-I goes HIGH(or CE2 goes LOW) coincident with or before R/W goes HIGH, the outputs
will remain at high impedance.
(4) If (TE is HIGH during the write cycle, the outputs will remain at high impedance.
(5) Because I/O signals may be in the output state at this time, input signals of reverse polarity
must not be applied.
DATA RETENTION CHARACTERISTICS (Ta = -40oto 85 °C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDH Data Retention Supply Voltage 2.0 - 3.6 V
VDH = 3.0V - - 20*
IDDSZ Standby Current #A
VDH = 3.6V - - 30
thR Chip Deselect to Data Retention Mode 0 - - nS
tR Recovery Time 5 - - mS
* ZyA (MAX) at Ta = -40''to40 ''C
CEI CONTROLLED DATA RETENTION MODE (See Note 1)
VDD DATA RETENTION MODE
2.7 v ------ - - - - ) B------------------.----------
(See Note 2) (See Note 2)
“H --- N /
VDD - 0.2 V
W tCDR tR
1997-08-18 7/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
CE2 CONTROLLED DATA RETENTION MODE (See Note 3)
VDD —DD—\ DATA RETENTION MODE h=,
2.7V -----------d---
I/m N 4 tCDR tR
V - - -
IL tk, \\ 0.2V f"
(1) In Ctrl" controlled data retention mode, minimum standby current mode is entered when
CE2 s 0.2V or CE2 2 VDD - 0.2 V.
(2) When TftlT" is operating at the VIH level (2.2V), the operating current is given by IDDSl
during the transition of VDD from 3.6V to 2.4V.
(3) In CE2 controlled data retention mode, minimum standby current mode is entered when
CE2 s 0.2V.
1997-08-18 8/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
PACKAGE DIMENSIONS (SOP32-P-525-1.27)
Unit in mm
'huusiuesiuisssvii----a-
1ljliCjljljljliljljlr:jjrL_,
0.775TYP o.3:o.1
- _).pp,ia,.,z,,i,
10 7i0 2
1 4.1 3:0.3
(525m)
2 8MAX
0,15 +9005
Weight: 1.049 (typ)
1997-08-18 9/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
PACKAGE DIMENSIONS (TSOPI 32-P-0820-0.50)
Unit in mm
n: k x
113 CNI
sly-j',, s''):',':) co'
35 A c::;
17 a.'
18.4A0.2 " ci,'-; 1.0i0.1 0.1 :0.05
20.0:02 <5 1.2MAX
Weight: 0.349 (typ)
1997-08-18 10/13
TOSHIBA TC55V1001Fl/FTI/TRI/STI/SRl-85L,-10L
PACKAGE DIMENSIONS (TSOPI 32-P-0820-0.50A)
Unit in mm
1E1 cu.
IEI k x
"ar'Cl _ u) co
iFg "it,:,
16 a.'
18.4i0.2 = E 1 0io.1
20.0:02 ci 1.2MAX
0.5i0.
Weight: 0.349 (typ)
1997-08-18 11/13
TOSHIBA
PACKAGE DIMENSIONS (TSOPI 32-P-0.50)
TC55V1001Fl/FTl/TRl/STl/SRI-85L,-10L
Unit in mm
F 1:13 328 n
g C) 1 CIE3 +1
EEC :ID a
EEC TIE} w'
GI PE__y,
EE 419 'JK" >< _
cur, -urn < C
[:n: :lIJ E o
IZIC 4m
El: :EEI m I
LI 3;;
16§g a 174:
4 118:0.1 E , 01:0.05
" 13410.2 CD 41.2MAX
Weight: 0.249 (typ)
1997-08-18 12/13
TOSHIBA
TC55V1001Fl/FTl/TRl/STl/SRI-85L,-10L
PACKAGE DIMENSIONS (TSOPI 32-P-0.50A)
Unit in mm
; 113131 8 7
323% C) 33 :1
:11 ZED g
1:]: 3D ei
ET: 33 1: Q . _
CIC :[E] g
- :11: .
SE -rT" m io]
EH; - I
Cl]: :EEJ I
[iT, E73 E1
EU: :LLI
17CICL; J):'16‘:+>K
11.8'_"O.1 _ l E‘ 0.1io.05
13.4:02 CY - 41.2MAx
jx’ h, ll
c) (h,
T0°~10
05:0.1
Weight: 0.249 (typ)
1997-08-18 13/13
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