TC55257DFL-85L ,32,768 WORD-8 BIT STATIC RAMTOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-7OV,-85V32,768-WORD BY 8-BIT STATIC RAMThe TC55257DPL/DFL/DFT ..
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TC55257DFL-TC55257DFL-55L-TC55257DFL70L-TC55257DFL-70L-TC55257DFL85L-TC55257DFL-85L-TC55257DFTL-55L-TC55257DFTL-70L-TC55257DFTL-85L-TC55257DPL-55L-TC55257DPL-70L-TC55257DPL-85L-TC55257DTRL-70L-TC55257DTRL-85L
32,768 WORD-8 BIT STATIC RAM
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
32,768-WORD BY 8-BIT STATIC RAM
DESCRIPTION
The TC55257DPL/DFL/DFTL/DTRL is a 262,144-bit static random access memory (SRAM) organized as
32,768 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates
from a single 2.7 to 5.5 V fpower supply. Advanced circuit technology provides both high speed and low power
at an operating current o 5 mA/MHz (typ) and a minimum cycle tige of 55 ns. It is automatically placed in
Jow-powe_rmode at 0.3 prA standby current (typ) when chip enable (CE) is asserted high. Thei are two control
inputs. CE is used to select the device and for data retention control, and output enable (OE) provides; fast
memory access. This device is well suited to various microprocessor system yrplrcat.i,on,s. where high speed, low
Bower and battery backup are re uired. The TC55257DPL/DFL/DFTL/DTRL IS available in a standard plastic
8-pin dual-in-line package (DIP , plastic 28-pin small-outline package (SOP) and normal and reverse pinout
plastic 28-pin thin-gmall-dutline package (TSOP).
FEATU RES
0 Low-power dissipation 0 Access Times (maximum):
Operating: 27.5 mW/MHz (typical) 5V , 10% 2.7 to 5.5V
0 Standby current of 2 PA (maximum) at -55V .70v -85V -55V/-701/ -85V
Ta = 25°C Access Time 55 ns 70 ns 85 ns 120 ns 150 ns
0 Single power supply voltageif 2.7 to 5.5 V
0 Power down features using CE.
0 Data retention supply voltage of 2 to 5.5 V
0 Direct TTL compatibility for all inputs and 0 Packages:
outputs DIP28-P-600-2.54 (DPL) (Weight: 4.42 g typ)
SOP28-P-450-1.27 (DFL) (Weight: 0.79 g typ)
TSOP I 28-P-0.55 (DFTL) (Weight: 0.22 gtyp)
TSOP I 28-P-0.55A (DTRL) (Weight: 0.22 g typ)
E Access Time 55 ns 70 ns 85 ns 120 ns 150 ns
tN Access Time 30 ns 35 ns 45 ns 70 ns 75 ns
PIN ASSIGNMENT (TOP VIEW)
O 28 PIN DIP & SOP o 28 PIN TSOP (Normalpinout) (Reverse pinout)
A14 E 1 28 J Vor, Jlllllllllllllllllllllllll llllillllllllllllllllNl
A12 E 2 27 MM 14 1 1 14
A7 E 3 26 :IA13
A6 E 4 25 1A8
A5 E 5 24 149
A4 E 6 23 3&1
A? E 7 22 JOE
A2 E 8 21 [leo
A1 E 9 20 "
ME 10 19 11/08
1/01 L 11 18 31/07
1/02 E 12 17 11/06
1/03 E l? 16 J 1/05
GND E 14 15 il 1/04 15 28 28 15
IlllllMllllllllllT Mllllllllllllllllllllll
PIN NAMES
A0 to A14 Addresslnputs PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14
'rv) gead/‘Nr'teglc’ntm' PIN NAME E A11 A9 A3 A13 RIW VDD A14 A12 A7 A6 As A4 A3
- u.tpet Ena e PIN NO. 15 16 17 18 19 20 21 22 23 24 25 26 27 28
CE Chip Enable -
l/OI to l/O8 Data Input/Output PIN NAME A2 A1 A0 l/OI I/O2 IIO3 GND l/O4 l/O5 I/O6 l/O? IIO8 CE A10
VDD Power
GND Ground
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1998-08-05 1/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
BLOCK DIAGRAM
A-4:) VDD
MEMORY CELL
512 x 64 x 8
(262144)
RON ADDRESS
REGISTER
RCNV ADDRESS
DECODER
- 64 -
l/OI 5' SENSE AMP
E COLUMN ADDRESS
' O DECODER
- < COLUMN ADDRESS
g g n: REGISTER
l/O8 8 'il
_I LLI
A0 A1A2 A3 A4A10
OPERATION MODE
MODE E E RNV l/OI to l/O8 POWER
Read L L H DOUT IDDO
Write L X L Dm IDDO
Outputs Disabled L H H High-Z IDDO
Standby H x x High-Z IDDS
Note: x = don't care. H = logic high. L = logiclow.
ABSOLUTE MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.3 to 7.0 V
" Input Voltage - th3* to 7.0 V
VI/O Input/Output Voltage - 0.5* to VDD + 0.5 V
PD Power Dissipation 1.0/0.6 ** W
Tsolder Soldering Temperature (10s) 260 "C
Tstrg Storage Temperature - 55 to 150 "C
Topr Operating Temperature 0 to 70 "C
* - 3.0 V when measured at a pulse width of 50 ns
** SOP
1998-08-05 2/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70°C)
SYMBOL PARAMETER MIN 5 'T/Y-',, 10% MAX MIN Tt 5.5V MAX UNIT
VDD Power Supply Voltage 4.5 - 5.5 2.7 - 5.5
" Input High Voltage 2.2 - VDD + 0.3 VDD - 0.2 - VDD + 0.3 V
VIL Input Low Voltage - 0.3* - 0.8 - 0.3* - 0.2
VDH Data Retention Supply Voltage 2.0 - 5.5 2.0 - 5.5
* - 3.0 V when measured at a pulse width of 50 ns
DC CHARACTERISTICS(Ta = ty' to 70°C, VDD = 3V i 10%)
SYMBOL PARAM ETER TEST CONDITION MIN TYP MAX UNIT
IlL Input Leakage Current " = 0V to VDD - - i 1.0 #A
IOH Output High Current VOH = 2.4V - 1.0 - - mA
IOL Output Low Current VOL = 0.4 V 4.0 - - mA
E=V|H or WW=V|LOFE=V|H
lLo Output Leakage Current - - t 1.0 #A
VOUT = 0V to VDD
E = VIL tcycle = 1 M; - 10 -
I MN = " A
DDO1 Other Inputs = V|H/V||_ tcycle = min - - 70 m
IOUT = 0 mA
Operating Current E = 0.2V tcyde = 1 M; - 5 -
R/W = VDD - 0.2V
I Other Inputs A
DDO2 tcycle = min - - 60 m
= Vor, - 0.2 V/0.2V
IOUT = 0 mA
IDDs1 Standby Current E = Ihr, - - 3 mA
E = V - 0.2V Ta = (Y' to 70''C - - 20
IDDSZ Stand by Current DD #A
VDD = 2.0 to 5.5V Ta = 25°C - 0.3 2 pA
1998-08-05 3/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
DC CHARACTERISTICS(Ta = 0° to 70°c,vDD = SV , 10%)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
IIL Input Leakage Current " = 0V to VDD - - i 1.0 #A
IOH Output High Current VOH = VDD - 0.2V - 0.1 - - mA
kw Output Low Current VOL = 0.2V 0.1 - - mA
E = V = V
ILO Output Leakage Current - IH or R/W IL or - - + 1 0 pA
OE = Ihro VOUT = 0V to VDD
:IEW= ste/rl,", 0 2 v min - - 20
IDDOZ Operating Current - DD - . ' Tcycle mA
IOUT = 0 mA
Other Inputs = VDD - 0.2 V/0.2V 1 M; - - 5
Von = Ta = 25 c - 1 1.5
3V110% Ta=0° to 70°C - - 15
IDDSZ Standby Current T = VDD - 0.2V Ta = 25°C - - 1 [1A
Yoo = 3.0V Ta = ty' to 40°C - - 2
Ta = ty' to 70''C - - 10
CAPACITANCE (Ta = 25tf = 1 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance VIN = GND 10 F
COUT Output Capacitance VOUT = GND 10
Note: This parameter is periodically sampled and is not 100% tested.
1998-08-05 4/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = 0° to 70°C, VDD = 5 V i 10%)
READ CYCLE
TC55257DPL/DFL/DFTL/DTRL
SYMBOL PARAMETER -55V -70V -85V UNIT
MIN MAX MIN MAX MIN MAX
tRC Read Cycle Time 55 - 70 - 85 -
tACC Address Access Time - 55 - 70 - 85
tco Chip Enable Access Time - 55 - 70 - 85
tog Output Enable Access Time - 30 - 35 - 45
tcos Chip Enable Low to Output Active 10 - 10 - 10 - ns
toga Output Enable Low to Output Active 5 - 5 - 5 -
tOD Chip Enable High to Output High-Z - 20 - 25 - 30
tooo Output Enable High to Output High-Z - 20 - 25 - 30
tom Output Data Hold Time 10 - 10 - 10 -
WRITE CYCLE
TC55257DPUDFUDFTUDTRL
SYMBOL PARAMETER -55V -70V -85V UNIT
MIN MAX MIN MAX MIN MAX
twc Write Cycle Time 55 - 70 - 85 -
twp Write Pulse Width 45 - 50 - 60 -
tcw Chip Enable to End of Write 50 - 60 - 65 -
tAS Address Setup Time 0 - O - 0 -
tWR Write Recovery Time 0 - 0 - 0 - ns
tODW MN Low to Output High-Z - 20 - 25 - 30
togw R/W High to Output Active 5 - 5 - 5 -
tDS Data Setup Time 25 - 30 - 4O -
tDH Data Hold Time 0 - 0 - 0 -
AC TEST CONDITION S
Output load: 30 pF + one TTL gate (-55V)
100 pF + one TTL gate (-70L, -85L)
Input pulse level: 0.6 V, 2.4 V
Timing measurements: 1.5 V
Reference level: 1.5 V
tR, tan: 5 ns
1998-08-05 5/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = 0° to 70°C, VDD = 2.7 to 5.5 V)
READ CYCLE
TC55257DPL/DFL/DFTL/DTRL
SYMBOL PARAMETER -55V/-70V -85V UNIT
MIN MAX MIN MAX
tRc Read Cycle Time 120 - 150 -
tacc Address Access Time - 120 - 150
tco Chip Enable Access Time - 120 - 150
toe Output Enable Access Time - 70 - 75
tcoE Chip Enable Low to Output Active 10 - 10 - ns
tOEE Output Enable Low to Output Active 5 - 5 -
too Chip Enable High to Output High-Z - 50 - 50
tom Output Enable High to Output High-Z - 50 - 50
tOH Output Data Hold Time 10 - 10 -
WRITE CYCLE
TC55257DPUDFUDFTUDTRL
SYMBOL PARAMETER -55V/-70V -85V UNIT
MIN MAX MIN MAX
twc Write Cycle Time 120 - 150 -
twp Write Pulse Width 80 - 100 -
tcw Chip Enable to End of Write 100 - 120 -
tas Address Setup Time 0 - 0 -
tWR Write Recovery Time 0 - 0 - ns
toow R/W Low to Output High-Z - 50 - 50
tOEw MN High to Output Active 5 - 5 -
tos Data Setup Time 50 - 60 -
tDH Data Hold Time 0 - 0 -
AC TEST CONDITIONS
Output load: 100 pF (includingjig)
Input pulse level: 0.2 V, VDD - 0.2 V
Timing measurements: 1.5 V
Reference level: 1.5 V
tR, tF.' 5 ns
1998-08-05 6/13
Tt0SFlllBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
TIMING DIAGRAMS
ADDRESS X
ta tor,
I A tco I
CE "h; As,
Homm l tooo
Dour VALID DATA our
INDETERMINATE
WRITE CYCLE l (R/W CONTROLLED) (See Note 4)
ADDRESS X X
_s.stAs V twrt
CE _ ts
toDw -...toE
Dour (See Note 2) (See Note 3)
'M606666M66000666666600t' TN
0.0.00 ‘ ‘ ‘ 000
D 5MMMMMM8 MMF. ‘ Ammm Note 5) K
IN o. 2:. o . D00C. o. , o... co.
1998-08-05 7/1 w
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
WRITE CYCLE 2 LLCTif CONTROLLED) (See Note 4)
ADDRESS X X
tAs ' tun,
-ur-os-uD-Fi,
DIN v: V ALID DATA IN . KM, ( ee ote 5) iitii
Note: (1) ww remains HIGH for the read cycle.
(2) If UE goes LOW coincident with or after R/W goes LOW, the outputs will remain at high
impedance.
(3) If tTIT goes HIGH coincident with or before R/W goes HIGH, the outputs will remain at
high impedance.
(4) If tjTif is HIGH during the write cycle, the outputs will remain at high impedance.
(5) Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
1998-08-05 8/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
DATA RETENTION CHARACTERISTICS (Ta = 0° to 70°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDH Data Retention Supply Voltage 2.0 - 5.5 V
I S db C VDH = 3.0V - - 10* ,uA
DD 2 tan urrent
S y VDH = 5.5V - - 20
Chip Deselect to Data Retention
tCDR . 0 - -
Mode Time ns
tR Recovery Time tRc(See Note) - -
* 2 pzA (max) at Ta = ty' to 40°C
Note: Read cycle time.
CEcoNTROLLED DATA RETENTION MODE
DATA RETENTION MODE
4 5 v ------ - - - - -----------------
(See Note) (See Note)
" - - - - \
VDD - 0.2V
tCDR _
Note: When tTtf is operating at the VIH level (2.2 V), the standby current is given by IDD51 during
the transition of VDD from 4.5 to 2.4 V.
1998-08-05 9/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
PACKAGE DIMENSIONS (DIP28-P-600-2.54)
Units in mm
0-25 3a 1
310i02
Weight: 4.42g (typ)
1998-08-05 10/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
PACKAGE DIMENSIONS (SOP28-P-450-1.27)
Units in mm
'ihicccccruuc1i'
118i03
(450mil)
-ill1i'"rr,.,lr,ioiim.i,,",j,?1r--'--t
0.995TYP -,LP.4-o:1z,.za,
l4_ 19.0MAX
a 18.5:02
fil ' F3
"t ts, tiirii
N N l!)
La- 'DL...,
Weight: 0.799 (typ)
1998-08-05 11/13
TOSHIBA
TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
PACKAGE DIMENSIONS (TSOP I 28-P-0.55)
m C) El =1,
tat n: I
CE I]: n
EII III:
ii lg. "
'jig'' L
DI ' :IEI
= IIZI
14 = “- ,
= 11.8i0.2 _ 15 t
N 13.4:02 = ti
Weight: 0.229 (typ)
Units in mm
8.2MAX
7 910 1
1.0io.1 f. thldih05
1.2MAX _
0.15 1.6.05
1998-08-05 12/13
TOSHIBA TC55257DPL/DFL/DFTL/DTRL-55V,-70V,-85V
PACKAGE DIMENSIONS (TSOP I 28-P-0.55A)
Units in mm
28 an: 1 (x;
C) 1:. CD
lil i?
31:: E
'SE:' , ai
'iii::' "
L It.8:t:0.2 E 1 Od:0.1 " 0.110.05
A V 13.4102 g 1.2MAX
" ci A
A, o tf]
ol vu, b
..l"ji'j:t:?,'
o.5¢o.1
Weight: 0.22g (typ)
1998-08-05 13/13
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