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TC551664BFT-15-TC551664BJ-12-TC551664BJ15-TC551664BJ-15
65,536-WORD BY 16-BIT CMOS STATIC RAM
TOSHIBA TC551664BJ/BFT-12,-15
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
65,536-WORD BY 16-BIT CMOS STATIC RAM
DESC RI PTION
The TC551664BJ/BFT is a 1,048,576-bit high-speed static random access memory (SRAM) organized as 65,536
words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it
operates from a single 5 V power supply. Chip enable (CT) can be used to place the device in a low-power mode,
and output enable (UE) provides fast memory access. Data byte control signals (E, W) provide lower and
upper byte access. This device is well suited to cache memory applications where high-speed access and high-
speed storage are required. All inputs and outputs are directly TTL compatible. The TC551664BJ/BFT is
available in a plastic 44-pin SOJ (400 mil width) and TSOP packages for high density surface assembly.
FEATURES
0 Fast access time (the following are maximum values)
TC551664AJ-12: 12 ns
TC551664AJ-15: 15 ns
Single power supply voltage of 5 V i 10%.
Fully static operation
All inputs and outputs are TTL compatible
0 Low-power dissipation Output buffer control using tTIT
(the following are maximum values) Data byte control using -ITg" (101 to 108) and Trg"
Cycle Time 12 15 20 25 30 ns (109 to 1016)
Operation (max) 290 260 220 200 180 2t;triu, 1.27(BJ) (W . ht 1.64 t )
Standby:1mA(both devices) - - - . e1g . . g yp
TSOP H 44-P-400-0.80 (BFT) (Weight: 0.45 g typ)
PIN ASSIGNMENT PIN NAMES
TC551664BJ TC551664BFT A0 to A15 Address Inputs
A4 E 1 44 ZIAS A4 1: 1° 44 = A5 I/O1 t1/o16 Data Inputs/Outputs
A3 E 2 43 Cl A6 tl E g fd 2 f/ CE Chip Enable
A2 L 42 Cl A7 - - .
A1 E , 41 Elm A1 1: 4 41 = " VLE Write Enable Input
A0 c 5 40 :w A_O = 5 40 = £3 OE Output Enable
Eta 393E “:6 39=LB tCB.WB DataB C ll
1/01 = 7 38 = l/O16 , yte or3tro roput
V01 E 7 A 38 Cl V015 1/02 I: 8 E 37 = 1/015 VOD Power (+ 5V)
I/O2 L 8 E 37 Cl I/O15 I/O3 = 9 LU 36 = you d
I/03 E 9 ug 36 Cl I/O14 I/O4 = 10 - 35 :1 non GND Groun
l/O4 E 10 ; 35 31/013 VDD I: 11 > 34 = GND NC No Connection
v LII 34 JGND GNDI=12 33 :1va
6133 L 12 n. 33 IIVDD I/05 = 13 g 32 21/012 NU Not Used (Input)
I LI o 2Cll 12 |/06|=14 31=II/011
118% 1131 I- 31 311811 ”07': 15 t 30 = l/O10
1/07 E 15 V 30 11/010 '(,%g': 1? £3 2 Pf
|/O_8E16 29:11/09 “5:18 27:A'8'
WE L 17 28 Cl N.U. A14=19 26 = A9
A15E 18 270A8 A131:20 25 :A10
A14E 19 26 :IA9 A121:21 24:1A11
A13 L 20 25 JA10 N.C. I: 22 23 = N.C.
A12 E 21 24 Cl A11
N.C. L 22 23 Cl N.C.
(SOJ) (TSOP)
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1998-06-26 1/10
TOSHIBA TC551664BJ/BFT-12,-15
BLOCK DIAGRAM
m E H VDD
tii 58 MEMORY GND
o: g “E CELL ARRAY I
512 x 128 x 16
|/81 (1,048,576)
I/O3 < F- ttl l-. m
I/04 F- i'. tl E 2 E
IIOS < a u, < F- u.
l/O6 Cl - g o 3 Z)
PO? o m
l/O9 SENSE AMP
l/O11 < I- f, < S E
l/O12 F- a u. 'at u,
K812 g Ey, COLUMN 053
K81?) - m DECODER 0 “1
COLUMN
ADDRESS BUFFER
ENERAT R
G 0 A5 A7 A9 A11
A6 A8 A10
9| 5| El 8|
MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.5 to 7.0 V
" Input Terminal Voltage - 2.0* to 7.0 V
VI/o Input/Output Terminal Voltage - 0.5 * to VDD + 0.5 V
PD Power Dissipation 1.5 W
Tsolder Soldering Temperature (10s) 260 ''C
Tstrg Storage Temperature - 65 to 150 'C
Topr Operating Temperature - 10 to 85 ''C
*: - 3V with a pulse width of 10 ns
1998-06-26 2/10
TOSHIBA TC551664BJ/BFT-12,-15
DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
I/oo Power Supply Voltage 4.5 5.0 5.5 V
VIH Input High Voltage 2.2 - VDD + 0.5 V
" Input Low Voltage - 0.5 * - 0.8 V
*: - 3V with a pulse width of 10 ns
DC CHARACTERISTICS(Ta = 0° to 70°C, VDD = 51/ i 10%)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
I Input Leakage Current V - 0V t V + 10 A
IL (Except NU Pin) IN - 0 DD - ’u
C-E = V W = V tN = V
lLo Output Leakage Current C IH or IL or 0 IH - - i 10 pzA
VOUT = 0V to VDD
I Input Current V 0 t 0 8V 1 20 A
I(lNIU) (NU Pin) IN - o . - - /1
IOH Output High Current VOH = 2.4V - 4 - - mA
IOL Output Low Current VOL = 0.4V 8 - - mA
tcycle = 12 ns - - 290
- tcycle = 15 ns - - 260
CE = V|L, Iout = 0 mA
IDDO Operating Current tcycle = 20 ns - - 220 mA
Other Inputs = VIH or VIL tcycle = 25 ns - _ 200
tcycle = 30 ns - - 180
|DDS1 E = I/wo Other Inputs = " or " - - 30
I Standby Current 3 = VDD - 0.2V 1 mA
DD$2 Other Inputs = VDD - 0.2V or 0.2V _ _
CAPACITANCE (Ta = 25°C,f = 1.0 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
CIN Input Capacitance VIN = GND 6 pF
Cl/o Input/Output Capacitance l/vo = GND 8 pF
Note: This parameter is periodically sampled and is not 100% tested.
1998-06-26 3/10
TOSHIBA TC551664BJ/BFT-12,-15
OPERATING MODE
MODE tTi? ?TE 'flirt'' 'LI)'"" Trg- I/OI to I/O8 l/O9 to I/O16 POWER
L L Output Output IDDO
Read L L H H L High Impedance Output IDDO
L H Output High Impedance IDDO
L L Input Input IDDO
Write L x L H L High Impedance Input IDDO
L H Input High Impedance IDDO
L H H x x
Outputs Disable High Impedance High Impedance IDDO
L x x H H
Standby H x x x x High Impedance High Impedance IDDS
X : Don't care
Note: The NU pin must be left unconnected or tied to GND or a voltage level of less than 0.8 V.
You must not apply a voltage of more than 0.8V to the NU.
1998-06-26 4/10
TOSHIBA TC551664BJ/BFT-12,-15
AC CHARACTERISTICS(Ta = 0° to 70°C (Note 1),VDD = 5v i 10%)
READ CYCLE
TC551664BJ/BFT-12 TC551664BJ/BFT-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
tRC Read Cycle Time 12 - 15 -
tacc Address Access Time - 12 - 15
tco Chip Enable Access Time - 12 - 15
toe Output Enable Access Time - 6 - 8
tBA Upper Byte, Lower Byte Access Time - 6 - 8
tOH Output Data Hold Time from Address Change 5 - 5 -
tcoe Output Enable Time from Chip Enable 5 - 5 -
tOEE Output Enable Time from Output Enable 1 - 1 -
tBE Output Enable Time from Upper Byte, Lower Byte 1 - 1 -
tcoo Output Disable Time from Chip Enable - 8 - 8
tone Output Disable Time from Output Enable - 8 - 8
tap Output Disable Time from Upper Byte, Lower Byte - 8 - 8
WRITE CYCLE
TC551564BJ/BFT-12 TC551664BJ/BFT-15
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
twc Write Cycle Time 12 - 15 -
tum Write Pulse Width 8 - 9 -
tcw Chip Enable to End of Write 10 - 12 -
th Upper Byte, Lower Byte Enable to End of Write 10 - 12 -
taw Address Valid to End of Write 10 - 12 -
tas Address Setup Time 0 - 0 - ns
tWR Write Recovery Time 0 - 0 -
tos Data Setup Time 6 - 8 -
tDH Data Hold Time 0 - 0 -
tosw Output Enable Time from Write Enable 1 - 1 -
tODW Output Disable Time from Write Enable - 8 - 8
AC TEST CONDITIONS FIG. 1
Input Pulse Level 3.0V, 0.0V
Input Pulse Rise and Fall Time 3 ns 4800 4800
" pin " pin
Input Timing Measurement 1 5V
R f L I .
e erence eve CL = 30 pp 2559 CL = 5 pF 2559
Output Timing Measurement 1 5V l
Reference Level .
(For tctw, tOEE: tBE, tCOD.
Output Load Fig. 1 tom, tBD, tOEw and toDw)
1998-06-26 5/10
TOSHIBA TC551664BJ/BFT-12,-15
TIMING DIAGRAMS
READ CYCLE (See Note 2)
ADDRESS
tCOD (See Note 6)
tooo (See Note 6)
E (See Note 6)
t (See Note 6)
Note 6 BD
Dout VALID DATA OUT
tCOE (See Note 6)
INDETERMINATE INDETERMINATE
WRITE CYCLE 1 (W CONTROLLED) (See Note 5)
ADDRESS
tODW (See Note 6) tOEW (See Note 6)
Dout (See Note 3) (See Note 4)
INDETERMINATE tDS INDETERMINATE
Din VALID DATA IN
1998-06-26 6/10
TOSHIBA
TC551664BJ/BFT-12,-15
WRITE CYCLE 2 LEE- CONTROLLED) (See Note 5)
ADDRESS
twp tWR
tBE (See Note 6)
toow (See Note 6)
tCOE (See Note 6)
INDETERMINATE wtr-os-ts-ori,
VALID DATA IN
WRITE CYCLE 3 (W, E CONTROLLED) (See Note 5)
ADDRESS
twp tum
_ tcw ’
tBE (See Note 6)
4 _ tODW (See Note 6)
tCOE (See Note 6)
INDETERMINATE tos sts-Ori,
VALID DATA IN
1998-06-26 7/10
TOSHIBA TC551664BJ/BFT-12,-15
Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400
linear feet per minute.
(2) WE remains HIGH for the Read Cycle.
(3)If tTE goes LOW coincident with or after IT/E goes LOW, the outputs will remain
at high impedance.
(4) If UE goes HIGH coincident with or before W goes HIGH, the outputs will remain
at high impedance.
(5) If UE- is HIGH during the write cycle, the outputs will remain at high impedance.
(6) The parameters specified below are measured using the load shown in Fig. 1.
(A) tCOE, tOEE, tBE, tOEW ...... Output Enable Time
(B) tCOD, tODO, tBD, tODW ...... Output Disable Time
w, E tt
(A) (B)
_-_ _-_
' _) 0.2 v
0.2 V '
DOUT -, VALID DATA OUT
0.2 V g - 0.2 v
INDETERMINATE INDETERMINATE 4
1998-06-26 8/10
TOSHIBA TC551664BJ/BFT-12,-15
PACKAGE DIMENSIONS
Plastic SOJ (SOJ44-P-400-1.27)
Unitsinmm
'r""""'-"""""""""'"'"'-"''-':-
$9 c). m
I-Jr-JL-dl-JI-ICICI/lr-jr-jr-Ut-JCI-tut-ici-tut-gt-ii-J
29.0MAX
28.58i0.12
Weight: 1.64 g (typ)
1998-06-26 9/10
TOSHIBA TC551664BJ/BFT-12,-15
PACKAGE DIMENSIONS
Plastic TSOP (TSOPII 44-P-400-0.80)
Units in mm
'lRqllRflllqflppppppppgpgpfl -
, 're.
_"r1"e"""1l3,i,li,, -
0.805TYP 0310.05
-> $013311]
I 18.81MAX
I 18.41i0.1 [:5,i.i.). ri'i';
Weight: 0.45g (typ)
1998-06-26 10/10
www.ic-phoenix.com
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