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TC551001N/a41avaiSILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM
TC551001CF-55L |TC551001CF55LTOSHIBA ?N/a9avaiTC551001CP55
TC551001CF70TOSHIBAN/a58avaiTC551001CP55
TC551001CF-70 |TC551001CF70TOSN/a50avaiTC551001CP55
TC551001CF70LTOSHIBAN/a12184avaiTC551001CP55
TC551001CF-70L |TC551001CF70LTOSHIBAN/a5704avaiTC551001CP55
TC551001CF-70L |TC551001CF70LTOSN/a124avaiTC551001CP55
TC551001CF-70L |TC551001CF70LN/a126avaiTC551001CP55
TC551001CF-85L |TC551001CF85LN/a5avaiTC551001CP55
TC551001CFT70N/a900avaiTC551001CP55
TC551001-CFT-70 |TC551001CFT70TOSN/a60avaiTC551001CP55
TC551001CFT-70 |TC551001CFT70N/a900avaiTC551001CP55
TC551001CFT-85 |TC551001CFT85TOSHIBAN/a3600avaiTC551001CP55
TC551001CFT-85L |TC551001CFT85LTOSN/a35avaiTC551001CP55
TC551001CP-55L |TC551001CP55LTOSHIBAN/a7380avai131,072 WORD x 8 BIT STATIC RAM
TC551001CP-70 |TC551001CP70TOSHIBAN/a8800avaiTC551001CP55
TC551001CTR-70L |TC551001CTR70LTOSHIBA ?N/a500avai131,072 WORD x 8 BIT STATIC RAM


TC551001CF70L ,TC551001CP55applications where high speed, low power and battery backup are required. The TC551001CP/CF/CFT/CTR ..
TC551001CF-70L ,TC551001CP55features using CEI and CE2. . Data retention sozrtrtlsr xrnH.su trp “F 9. +0 5.5 V 0 Direct TTI i ..
TC551001CF-70L ,TC551001CP55
TC551001CF-70L ,TC551001CP55applications where high speed, low power and battery backup are required. The TC551001CP/CF/CFT/CTR ..
TC551001CF-70L ,TC551001CP55features using CEI and CE2. . Data retention sozrtrtlsr xrnH.su trp “F 9. +0 5.5 V 0 Direct TTI i ..
TC551001CF-85L ,TC551001CP55TOSH I BA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-7OL,-85L131 ,072-WORD BY 8-BIT STATIC RAMT ..
TC90A30AF ,MOTION-ADAPTIVE 3-DIMENSIONAL YC SEPARATION/NOISE REDUCTION (NR) LSITC9OA3OAFT(‘QnARDAFREDUCTION (NR) LSITC90A3OAF is a motion-adaptive 3-dimensional YCseparation/NR L ..
TC90A44P ,NTSC 2-LINE DIGITAL Y / C SEPARATION ICTC90A44P,45P/F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC90A44P,TC90A45P,TC90A45 ..
TC90A45F ,NTSC 2-LINE DIGITAL Y / C SEPARATION ICTC90A44P,45P/F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC90A44P,TC90A45P,TC90A45 ..
TC90A45P ,NTSC 2-LINE DIGITAL Y / C SEPARATION ICTC90A44P,45P/F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC90A44P,TC90A45P,TC90A45 ..
TC90A49 ,3LINE DIGITAL Y / C SEPARATOR IC (MULTICOLOR TYPE)FEATURES  TV format : NTSC (3.58), PAL, M-PAL, and N-PAL  Dynamic comb filter  Vertical edge ..
TC90A49F ,3LINE DIGITAL Y / C SEPARATOR IC (MULTICOLOR TYPE)TC90A49P/F TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC90A49P,TC90A49F 3LINE DIG ..


TC551001-TC551001CF-55L-TC551001CF70-TC551001CF-70-TC551001CF70L-TC551001CF-70L-TC551001CF-85L-TC551001CFT70-TC551001-CFT-70-TC551001CFT-70-TC551001CFT-85-TC551001CFT-85L-TC551001CP-55L-TC551001CP-70-TC551001CTR-70L
131,072 WORD x 8 BIT STATIC RAM
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
131 ,072-WORD BY 8-BIT STATIC RAM
DESCRIPTION
The TC551001CP/CF/CFT/CTR/CST/CSR is a 1,048,576-bit static random access memory (SRAM) organized
as 131,072 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 5 V i 10% power supply. Advanced circuit technology provides both high speed and low
power at an operating current of 5 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed
in low-power mode at 1 PA standby current (typ) when chip enable (CE) is asserted high or (CE2) is asserted
low. There are threeeimtrol inputs. GET and CE2 are used to select the device and for data retention control,
and output enable (OE) provides fast memory access. This device is well suited to various microprocessor
system applications where high speed, low power and battery backup are required. The TC551001CP/CF/
CFT/CTR/CST/CSR is available in a standard plastic 32-pin dual-in-line package (DIP), plastic 32-pin small-
outline package (SOP) and normal and reverse pinout plastic 32-pin thin-small-outline package (TSOP).
F EATU R ES
0 Low-power dissipation 0 Access Times (maximum):
Operating: 27.5 mW/MHz (typical) TC551001CP/CF/CFT/CTR/CST/CSR
0 Single power supply voltage of 5 V i' 10% -55, -55L -70, -70L -85, -85L
0 Power down features using CE1 and CE2. Access Time 55 ns 70 ns 85 ns
0 Data retention supply voltage of 2 to 5.5 V m Access Time 55 ns 70 ns 85 ns
0 Direct TTL compatibility for all inputs and CE2 Access Time 55 ns 70 ns 85 ns
outputs w Access Time 30 ns 35 ns 45 ns
0 Standby Current(maximum) .' 0 Packages:
TC551001CP/CF/CFT/CTR/CST/CSR DIP32-P-600-2.54 (CP) (Weight: 4.45 g typ)
-55, -70, -85 -55L, -70L, -85L SOP32-P-525-1.27 (CF) (Weight: 1.04 g typ)
5.5V 100 [AA 20 pA TSOP I 32-P-0820-0.50 (CFT) (WBight. 0.34 g typ)
50 10 TSOP I 32-P-0820-0.50A (CTR) (Weight: 0.34 g typ)
3.0V FA FA TSOP I 32-P-0.50 (CST) (Weight: 0.24 g typ)
TSOP I 32-P-0.50A (CSR) (Weight: 0.24 g typ)
PIN ASSIGNMENT (TOP VIEW)
o 32 PIN DIP & SOP o 32 PIN TSOP
NC I: 1 V 32:1 V (Normalpinout) (Reverse pinout)
A16 C 2 31 El Ali?
A14 C 3 30:1 CE2
A12 I: 4 29: R/W 16 1
A7 c 5 28: A13
A6 cr 6 27:1 A8
A5 C 7 263 A9
A4 I: 8 25:1 Alf
A3 1: 9 24:1 OE
A2 I: 10 23:1 A10
Al C 11 225 CE1
A0 c 12 21:1 1/08
1/01 tE 13 20:1 I/O?
I/O2 '3 14 13% 118% 17 32
1133:12 17: .104
PIN NAMES
A0 to A16 Address _|nputs Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
'rv) geid’vt‘lrE'te 2,ntrol Pin Name A11 A9 A8 A13 MN CE2 A15 VDD NC A15 A14 A12 A7 A6 As A4
- u. pu na e Pin No. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
CE1, CE2 Chip Enable . - -
VDD Power (+ 5V)
GND Ground
NC No Connection
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1997-08-19 1/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
BLOCK DIAGRAM
A4 -o VDD
£2 a a a --o GND
A7 'tl :1: E MEMORY CELL
shul ga, SE fit ARRAY
A13 ft' " if?, 1024x128x8
/hlt 55 tg y? (1048576)
A16 tern ttctts cm
I/OI SENSEAMP
d COLUMNADDRESS
, f/ir, s
m, t COLUMNADDRESS
l/O8 8;
dll) COLUMNADDRESS
A0 A2 9
A1 A? A A10A11
OPERATION MODE
MODE W CE2 E MN I/OI to l/O8 POWER
Read L H L H DOUT IDDO
Write L H X L DIN IDDO
Outputs Disabled L H H H High-Z IDDO
H x x x High-Z IDDS
Standby .
X L X X High-Z IDDS
Note: x = don't care. H = logic high. L = logiclow.
ABSOLUTE MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.3 to 7.0 V
" Input Voltage - 0.3* to 7.0 V
l/vo Input and Output Voltage - 0.5 to VDD + 0.5 V
PD Power Dissipation 1.0/0.6** W
Tsolder Soldering Temperature (10s) 260 ''C
Tstrg. Storage Temperature - 55 to 150 T
Topr. Operating Temperature 0 to 70 "C
* - 3.0 V when measured at a pulse width of 50 ns ** SOP
1997-08-19 2/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDD Power Supply Voltage 4.5 5.0 5.5
" Input High Voltage 2.2 - VDD + 0.3 V
I/w. Input Low Voltage - 0.3* - 0.8
VDH Data Retention Supply Voltage 2.0 - 5.5
* - 3.0 V when measured at a pulse width of 50 ns
DC CHARACTERISTICS(Ta = ty' to 70°C, VDD = 51/ i 10%)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
IIL Input Leakage Current I/m: = 0V to VDD - - i 1.0 PA
IOH Output High Current VOH = 2.4V 1.0 - - mA
IOL Output Low Current VOL = 0.4V 4.0 - - mA
m: " or CE2 = " or R/W = VIL or
ILO Output Leakage Current - - - 11.0 PA
OE = VIH: VOUT = 0V to VDD
m = " and CE2 = " -55,-55L - - 80
- Tc cle= min
law and MN - I/wo y -70,-70L,-85,-85L - - 70 mA
IOUT = 0 mA
. Other Inputs = VIHNIL Tcycle= 1/15 - - 20
Operating Current 7
CE1 = 0.2V and -55,-55L - - 70
CE2 = VDD - 0.2V Tcycle=min
IDDOZ R/W = VDD - 0.2 V, -70, -70L, -8S, -85L - - 60 mA
IOUT = 0 mA
Other Inputs=VDo- 0.2 V/0.2 Tcycle=1ps - - 10
|DDS1 m = VIH or CE2 = VIL - - 3 mA
Ta = 25°C - 1 -
- - -55, -70, -85
loose Standby Current CE1 - I/oo - 0.2V Ta=0° to 70°C - - 100
or CE2 = 0.2V pA
(Note) Ta = 25''C - 1 2
VDD = 2.0 to 5.5V -55L,-70L, -85L
Ta = ty' to 70°C - - 20
Note: In standby mode with C? 2 VDD - 0.2 V, these limits are assured for the condition CE2 ; VDD - 0.2 V or CE2 E 0.2 V.
CAPACITANCE (Ta = 25tf = 1 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
ClN Input Capacitance VIN = GND 10 F
COUT Output Capacitance VOUT = GND 10
Note: This parameter is periodically sampled and is not 100% tested.
1997-08-19 3/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = 0° to 70°C, VDD = 5 V i 10%)
READ CYCLE
TC551001CP/CF/CFT/CTR/CST/CSR
SYMBOL PARAMETER -55, -55L -7o, -70L -85, -85L UNIT
MIN MAX MIN MAX MIN MAX
tRC Read Cycle Time 55 - 70 - 85 -
tACC Address Access Time - 55 - 70 - 85
tco1 Chip Enable (W) Access Time - 55 - 70 - 85
tco2 Chip Enable (CE2) Access Time - 55 - 70 - 85
tOE Output Enable Access Time - 30 - 35 - 45
tcoE Chip Enable Low to Output Active 10 - 10 - 10 - ns
tOEE Output Enable Low to Output Active 5 - 5 - 5 -
too Chip Enable High to Output High-Z - 20 - 25 - 30
tooo Output Enable High to Output High-Z - 20 - 25 - 30
tOH Output Data Hold Time 10 - 10 - 10 -
WRITE CYCLE
TC551001CP/CF/CFT/CTR/CST/CSR
SYMBOL PARAM ETER -55, -55L -7o, -70L -85, -85L UNIT
MIN MAX MIN MAX MIN MAX
twc Write Cycle Time 55 - 70 - 85 -
twp Write Pulse Width 45 - 50 - 60 -
tcw Chip Enable to End of Write 5 - 60 - 75 -
tAS Address Setup Time 0 - 0 - 0 -
tWR Write Recovery Time 0 - 0 - 0 - ns
toow R/W Low to Output High-Z - 20 - 25 - 30
togw R/W High to Output Active 5 - 5 - 5 -
tDS Data Setup Time 25 - 30 - 35 -
tDH Data Hold Time 0 - 0 - 0 -
AC TEST CONDITIONS
Output load: 30 pF + one TTL gate (-55, -55L)
.' 100 pF + one TTL gate (-70, -70L, -85, -85L)
Input pulse level: 0.6 V, 2.4 V
Timing measurements: 1.5 V
Reference level: 1.5 V
tR, tF: 5 ns
1997-08-19 4/14
TOSHIBA
TIMING DIAGRAMS
TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
READCYcI-E(SeeNote1)
ADDRESS X X
_ tacc t0H
CE2 // tcos "N. "K,
"'% tco1
tOE too
E 'N, //
toss tooo
DOUT t VALID DATA OUT
INDETERMINATE
WRITE CYCLE 1 (R/W CONTROLLED) (See Note 4)
ADDRESS
tum tWR
/ tcw W
fig w 7
A tODW tOEW
(See Note 2) (See Note 3)
tos tDH
/(See Note 5) VALID DATA IN (See Note 5)
/h,v,"j2',Di'ir'',',i',',, /
1997-08-19 5/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
WRITE CYCLE 2 LLCEI CONTROLLED) (See Note 4)
ADDRESS X
twe tum
CE2 , tcw 'W"
tcos t00w
tos tDH
DIN (See Note 5) VALID DATA IN (See Note 5)
WRITE CYCLE 3 (CE2 CONTROLLED) (See N ote 4)
ADDRESS
tos tDH
DIN (See Note 5) VALID DATA IN (See Note 5)
1997-08-19 6/14
TOSHIBA
TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
Note: (1) R/W remains HIGH for the read cycle.
(2) If CEI goes LOW (or CE2 goes HIGH) coincident with or after R/W goes LOW, the outputs
will remain at high impedance.
(3) If CEI goes HIGH (or CE2 goes LOW) coincident with or before R/W goes HIGH, the
outputs will remain at high impedance.
(4) If UE
is HIGH during the write cycle, the outputs will remain at high impedance.
(5) Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
DATA RETENTION CHARACTERISTICS (Ta = ty' to 70°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDH Data Retention Supply Voltage 2.0 - 5.5 V
vDH = 3.0V - - 50
-55,-70,-85
VDH = 5.5V - - 100
IDDSZ Standby Current PA
Vor, = 3.0V - - 10*
-55L, -70L, -85L
VDH = 5.5V - - 20
thR Chip Deselect to Data Retention Mode Time 0 - - nS
tR Recovery Time 5 - - mS
* 2 #A(max) at Ta = ty' to 40°C
CEI CONTROLLED DATA RETENTION MODE (See Note 1)
Von - DATA RETENTION MODE
4.5 v ------ - - - - .------------------s----------
Ihr., “7 \ /
VDD- 0.2V
(See Note 2) (See Note 2)
4 tCDR _ 4 tR _
1997-08-19 7/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
CE2 CONTROLLED DATA RETENTION MODE (See Note 3)
VDD CC) DATA RETENTION MODE hi,
4.5 v ---------'..------------------------i.---------
" tCDR tR
V - - - -
IL k , 0.2 v V
Note: (1) In CET controlled data retention mode, minimum standby current mode is entered when
CE2 s 0.2Vor CE2 2 VDD - 0.2V.
(2) When CE1 is operating at the VIH level (2.2 V), the operation current is given by 1DDSl
during the transition of VDD from 4.5 to 2.4 V.
(3) In CE2 controlled data retention mode, minimum standby current mode is entered when
CE2 s 0.2 V.
1997-08-19 8/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
PACKAGE DIMENSIONS (DIP32-P-600-2.54)
Units in mm
42.5MAX
42.0i0.2
i? g'.
1 1 $4 ti
I l l 2. we
I I E O
U P LO
1.95TVP 1.4_0.1 ”0.5_0.1 0.25®
Weight: 4.459 (typ)
1997-08-19 9/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
PACKAGE DIMENSIONS (SOP32-P-525-1.27)
Units in mm
'ii2uscsscrvc1s7----,
10 7+0 2
14.13i0.3
(525mil)
_i1ljliierili)ljrrirlrj)
0.775wp " o.3:o.1
21.1MAX
.4 20.6iO.2 pl,
IIII L, .
2 8MAX
0,15 :%.05
Weight: 1.04 g (typ)
1997-08-19 10/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
PACKAGE DIMENSIONS (TSOP I 32-P-0820-0.50)
Units in mm
1E 32 CM.
n: k x
El cu.
TT-T , co
ii-g g e;
18.4h0.2 E 1.0:0.1 0.1 i0.05
20.0:02 ci 1.2MAX
Weight: 0.34 g (typ)
1997-08-19 11/14
TOSHIBA
TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
PACKAGE DIMENSIONS (TSOP I 32-P-0820-0.50A)
1% 1 cu.
IIS CD
F.?, r
18.4i0.2 _ 16 t
20.0:02 o
Weight: 0.34 g (typ)
Units in mm
8.2MAX
7 9i0 1
1.0kihl I 0.1i0.05
1.2MAx_
0.15 $.05
0.5:h0.1
1997-08-19 12/14
TOSHIBA
PACKAGE DIMENSIONS (TSOP I 32-P-0.50)
TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
Units in mm
1nd Emaz‘é G 1 r"
End C) :11: +1 -'
:u: :u: all .
CD: T113 o' I
cm: 313 Y, I
CE 2L11C3---.-2Tc. Y_ I
3: 3D A if: o ._.
CI12 211') E fl I c;
5.: Ee?, f g g -
D3: :D3
ms: :11: -
CU: ZED
16:1:L a 17-0-
1 1181-01 E 1 0+01 ii,0-1--"05
co' 1.2MAX
1 13.4i02 _ x "
Weight: 0.24 g (typ)
0 ”5.3.055
ho--1oo
1997-08-19 13/14
TOSHIBA TC551001CP/CF/CFT/CTR/CST/CSR-55,-70,-85,-55L,-70L,-85L
PACKAGE DIMENSIONS (TSOP I 32-P-0.50A)
Units in mm
32cm T2131 ci 7 '
cad CD +1 -
cu: gl '
(:11: - o‘
:11: :ID V :
:13: CCC1TCI-.---'-'=
Eu: :3: A Q "l '_
1:13: :EEI CE
m E g 1
cu: ='ICl - _
Em -rr-t l
[:1]: CITED
CI Cary I')
El]: :[13
El]: :ILI
17EECL 11:16...
1181-01 " ,Z 0.110.05
13.4t0.2 " 1.2MAX
Weight: 0.24 g (typ)
1997-08-19 14/14

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