TC514400ASJ-70 ,70 ns, 4-bit generation dynamic RAMfeatures include single power supply of 5Vi10% tolerance, direct
interfacing capability with high ..
TC514400ASJL-70 ,70 ns, 4-bit generation dynamic RAMfeatures include single power supply of 5Vi10% tolerance, direct
interfacing capability with high ..
TC514400ASJL-70 ,70 ns, 4-bit generation dynamic RAM1,048,576 WORD x4 BIT DYNAMIC RAM PRELIMINARY
DESCRIPTION
The TC514400APL/AJvASJLAZL is the n ..
TC514400AZ-60 ,60 ns, 4-bit generation dynamic RAMFEATURES
. 1,048,576 word by 4 bit organization 0 Low Power .
. Fast access time and cycle time 6 ..
TC514400AZ-80 ,80 ns, 4-bit generation dynamic RAMFEATURES
0 1,048,576 word by 4 bit organization
. Fast access time and cycle time
TC514400AP ..
TC514400AZL-60 ,60 ns, 4-bit generation dynamic RAMfeatures include single power supply of SVi 10% tolerance, direct
interfucmg CupnbiliLy with high ..
TC7WBD125FK ,Dual Bus Switch with Level ShiftTC7WBD125FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7WBD125FK Dual Bus Swit ..
TC7WBD126AFK ,Dual Bus Switch with Level ShiftTC7WBD126AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7WBD126AFK Dual Bus Sw ..
TC7WBL125AFK ,General-purpose bus switchTC7WBL125AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7WBL125AFK Low-Voltage ..
TC7WBL125AFK ,General-purpose bus switchabsolute maximum ratings and the operating ranges. Please design the appropriate reliability upon r ..
TC7WBL125FK ,Bus SwitchFeatures • Operating voltage: V = 2~3.6 V CC• High speed operation: t = 0.25 ns (max) @3 V pd• Ultr ..
TC7WBL126AFK ,General-purpose bus switchabsolute maximum ratings and the operating ranges. Please design the appropriate reliability upon r ..
TC514400AJ-10-TC514400AP-80-TC514400ASJ-70-TC514400AZ-80
100 ns, 4-bit generation dynamic RAM
bR 62m: g" 3 fr“:
1,048,576 WORD >14 BIT D'v’i~J,".i\11|(f RAN!
PRELIMINARY
The TCi5i4400AP/AJ/ASJIA7, is the new generation dynamic RAM organized 1,048,576 words by 4
i2ffi.(i2.ilfElf2y..
bits, The TC514400AP/AJ/ASJ/AZ utilizes TOSHIBA‘S CMOS Silicon gate process technology as well
as advanced circuit techniques to provide wide operating margins, both internally and to the system
user. Multiplexed address inputs permit the TC514400AP/AJ/ASJ/AZ to be packaged in a standard 20
pin plastic DIP, 26/20 pin plastic SOJ(300/350mi1) and 20 pin plastic ZIP. The package size provides
high system bit densities and is compatible with widely available automated testing and insertion
equipment. System oriented features include single power supply of 5Vi10% tolerance, direct
interfacing capability with high performance logic families such as Schottky TTL.
FEATURES
. 1,048,576 word by 4 bit organization q Low Power
. Fast access time and cycle time 550mW MAX. Operating
, 4 CAP ASJIAZ (TC514400AP/AJ/ASJ/M-70)
"1f,"lft'i//v1 10 468mW MAX. Operating
. (TC514400AP/AJ/ASJ/A2--80)
IRA: R7Gpccesstime 70ns 80ns 100ns 413mW MAX. Operating
tAn Column Address 35m 40ns 50ns (TC514400AP/AJ(ASJ/M--10)
Access Time 5.5mW MAX. Standby
tou: 333 Attest Time 20ns 20ns 25ns . Outputs unlatched at cycle end allows two-
tet: Cycle Time 130ns 150ns 180nt dimensional chip selection
1pc Fatt Page Mode 0 Read-Modify-Write, CKS before m refresh,
Cycle Time ASns Sons 60ng m-only refresh, Hidden refresh, Fast Page
. Mode and Test Mode capability
. Si.?.irle Pefr, supply of 5V:t 10% . All inputs and outputs TIT, compatible
with a built-in V33 generator 0 1024 refresh c cles/les
0 Package T 514400AP , D1P20-P.3000
PIN NAMES TC5144OOAJ :SOJ26~P-350
..__.____. 4 A , 2 - .
AO~A9 Address Inputs UT Output Enable $8214288A§J , Eggoégfoooo:
m Row Address Strobe VO1~IIOQ Data lnput/Output
0T5 Column Address Strobe Vcc Power(+5V) BLOCK DIAGRAM
WRITE Read/Write Input vs, Ground _ . .
. v01 V02 V03 1ttM
PIN CONNECTION (TOP VIEW)
Vt: Vs:
Plum DIP Plank MN '0rtit " l 'lt'/klt 'tht," .06:
1 m.“ WATT! l 4 , f
i , i 1 6
. - ewo--- no.2 (LOCK -
S '""t""
, COLUMN COLUMN
8 not» ADDRESS 10:) oecoou
9 mo» wnmno) J smsum
10 " cr- mus" :10 GATE
A3th- ceurnouu -
Ado» "R' -
A50. nmtsu tt
ABO-D t COUNTEIUO) "
Aro- . " MEMORY
'tjiri-i,,, Jfls, l mt)?, to, :24 ARMY
A90? IUFiERSUO) g i 101lxl01h¢4
WM t''/lilfAui'ocl,' ' suamnt ms
GENERATOR
TC51 4400AP/AJ/ASJ/Az--70, TC51 4400AP/AJ/ASJ/AZ-80
TC51 4400AP/AJ/ASJ/Az--1 0
ABSOLUTE MAXIMUM RATINGS
ITEM SYMBOL RATING UNITS NOTES
Input Voltage Vm - 1~7 1
Output Voltage VOUT ..1-7 I
Power Supply Voltage VCC .-1--7 1
Operating Temperature Ton o-ro 'C 1
Storage Temperature Tsrs - 55-450 'C 1
Soldering Temperature ' time TSOLDER 260 . 10 'C . sec 1
Power Dissipation Po 700 mW 1
Short Circuit Output Current lour 50 mA 1
RECOMMENDED DC OPERATING CONDITIONS (Ta = O~70°c)
SYMBOL PARAMETER MIN. TYP. MAX. UNIT NOTES
Vcc Supply Voltage 4.5 5.0 5.5 V 2
" Input High Voltage 2.4 - 6.5 V 2
" Input Low Voltage - 1.0 - 0.8 V 2
TC51 44o0AP/AJ/ASJ/Az-70, TC514400AP/AJ/AS0/AZ-80
TC51 4400AP/A0/ASJ/Az-1 o
DC ELECTRICAL CHARACTERISTICS Mx = 5V i 10%, Ta = 0~70°c)
SYMBOL PARAMETER MIN. MAX. UNITS NOTES
OPERATING CURRENT tCMM00AMuJASttJu.70 - 100 3 4
Icm Average Power Supply Operating Current tCstM00AMutASltAgAt0 - 85 m
(RAT, m. Address Cycling: tstc= tar. MIN0 TCSuq00AMWASttAbtt) - " 5
STANDBY CURRENT
Ittt Power Supply Standby Current - 2 mA
(mnmzvm)
RAT ONLY REFRESH CURRENT TCs16d00AFltuaSVAt.70 - 100 .
Icta Average Power Supply Current, m Only Mode TC5iM00AFtAgfASltAZ-80 - 85 mA 3, s
tl75 Cycling, m=VmI tac'tnc MIN) TCHM00AWAJtAnrA2r10 - "
FAST PAGE MODE CURRENT TCsu400APfAJtA$ltAbr0 - " 3 4
Average Power Supply Current, Fan Page Mode TCs1M00AWAltAtltAb80 - 60 mA
'ca ‘m3vlb CM, Address Cycling: tpcjt MIN) TCstM00AWluttultAb10 - 55 5
STANDBY CURRENT
Iccs Power Supply Standby Current - 1 mA
(R: em. Vcc - 0.2V)
CK: BEFORE m REFRESH CURRENT TCMM00APtAJ/A$ttAb7tt - 100
k:cs Average Power Supply Current, as "fore m TCSIMOOAFIAJIASJIAZ-OO - 85 mA 3. 5
Mode (W. CE Cycling: ‘nc='~ac MW.) TCsu400APJAlfA$ltAbtty - "
INPUT LEAKAGE CURRENT
h (U Input Leakage Current, any input - 10 IO M
(OVSVINS 5.5V, All Other Pins Not Under Test: tM
OUTPUT LEAKAGE CURRENT
Io tu . . - 10 tt) pA
(Douf " disabled, 0VaVourSS.5V)
OUTPUT LEVEL
Von " . 2.4 - v
_ Output H Level Voltagcuoma -5mA)
OUTPUT LEVEL
VOL . . - 0.4 v
Output L Level Voltage(lourm4.2mAl
TC51 4400AP/AJ/ASd/Az-70, TC51 4400AP/AJ/ASd/Az-8o
TC51 4400AP/AJ/ASJ/AZ-1 0
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Vcc=5V.t10%, Ta=0~70°c) (Notes 6, 7, 8)
TCS 1 M00AN ITCS14400API TC514400AP]
SYMBOL PARAMETER Ju/ASlfAb70 ‘AJ/ASJ/AZ-BO AJ/ASJ/Az-w UNIT NOTES
MIN. MAX. MIN. MAX. MIN. MAX.
IRC Random Read or Write Cyde Time 130 - ISO - I' 180 - ns
toaw Read-Modify-Write Cycle Time 185 - 205 - 245 - n:
in Fast Page Mode Cycle Time 45 - 50 - 60 - m
IPRMW t'S'#,','r"" Read-Modify-Write 100 - IOS - 125 - m
thac Access Time from m - 7O - 80 - 100 ns 9;:
tag Access Time from UK - 20 - 20 - 25 n: 9,14
tan Access Time from Column Address - 3S - " - St) m 9,15
tCPA Access Time from UT; Precharge - M - 45 - " ns 9
tcu m to output in Low-Z - 0 - - n: g
tor, Output Buffer Turn-off Delay 20 0 " 0 20 m 10
tr Transition Time (Rise and Fall) 3 so 3 so 3 st) m 8
tar, m Ptecharge Time so - 60 - 70 - ns
tug m Pulse Width 70 10,000 80 I0.000 100 10,000 ns
tttasp m Pulse Width (Fast Page Mode) 70 200,000 80 200,000 100 200,000 ns
tits" m Hold Time 20 - 20 - 25 - ns
“mo 2:122:12; J'" CB Precharge 40 - " - 55 - ns
lcsu :35 Hold Time 70 - 80 - 100 - ns
tag a; Pulse Width 20 10,000 20 10,000 25 10,000 ns
taco m to m Delay Time 20 50 20 60 25 " ns 14
1m) W to Column Address Delay Time 15 " IS 40 20 50 ns 15
lg; :23 to W Precharge Time 5 - S - ID - ns
to US Precharge Time 10 - 10 - IO - ns
. tattt Row Address Set-Up Time 0 - 0 - 0 - ns
tun Row Address Hold Time 10 - 10 - IS - ns
tap: Column Address Set-Up Time 0 - 0 - O - m
too, Column Address Hold Time l5 - IS - 20 - ns
tnat Column Address to m Lead Time 35 - " - 50 - n5
lacs Read Command Set-Up Time 0 - 0 - 0 - ns
trio, Read Command Hold Time 0 - 0 - - ns ll
TC51 44MAP/AJ/AS0/Az-70, TC51 440oAP/AJ/AS0/Az-80
TC51 440oAP/A0/ASJ/Az--1 0
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Continued)
TC514400AP/ JCs I M00AN TCS 14400AP/
swam PARAMETER JulASllAb70 AVASmW80 ANASllAZ-w UNITS NOTES
MIN. MAX. MIN. MAX. MIN. MAX.
1m 1"fgomma"d Hold Time referenced o - o - tr - ns t I
twt:" Write Command Hold Time 15 - 15 - 20 - ns
twp Write Command_Pulse Width " - 15 - 20 - ns
tem Write Command to 1178 Lead Time 20 - 20 - 25 - ns
tcwi. Write Command to CAT Lead Time 20 - 20 - 25 - ns
ttts Data Set-Up Time tt - o - 0 - ns 12
tim Data Hold Time 15 - 15 - 20 - ns It
tut; Refresh Period - 16 - 16 - 16 ms
tssts Write Command Set-ul' Time 0 - 0 - 0 - ns 13
kwo m to WFITE Delay Time 50 - so - 60 - ns 13
tgwp m to WRITE Delay Time 100 - Ito - 135 - ns 13
mm Column Address to WRITE Delay Time " - 70 - 85 - ns 13
lcywp GS Precharge to WHITE Delay Time I 70 - " - 90 - ns 13
km m Set-Up Time s .. 5 - s - n:
(35 before m Cycle)
tam m Hold Time 15 - IS - 20 - ns
CM before m Cycle)
hoc m to m Prechargg Time 0 - O - 0 - as
as Prechar e Time b f re
tor Counter Testhycle) m e ° W 40 - " - SO - m
ttttm mvHold Time referenced to IE 10 - 10 - 20 - n!
105,. UT Access Time - 20 .. 20 - " n:
tom UP to Data Delay 20 - 20 - 25 - n5
tost Output buffer turn off Delay Time 0 20 0 20 ll 20 ns 10
from UK
tom tig Command Hold Time 20 - 20 - 25 - as
twrt Write Commamd Su-Up Time 10 - 10 - 10 - m
. (Test Mode In)
twru Write Commamd Hold Time 10 - 10 - 10 - ns
(Test Mode In)
twm, WR'ITE to W Precharge Time 10 - 10 - It) - ns
(m before m Cycle)
twot WWW! to m Hold Time 10 - 10 - It) - ns
ti7T before m Cyde)
TC51 4400AP/AJ/ASJ/Az--70, TC51 44MAPlAJ/ASJ/AZ-80
TC51 4400AP/AJ/ASJ/AZ-1 o
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS IN THE
TEST MODE
TCS I440OAPI .TC514400AP/ TC514400AP/
SYMBOL PARAMETER AJIASJIAZ-7O AJ/ASJIAZ-BO AJ/ASJIAZ-1O UNITS NOTES
MIN. MAX. MIN. MAX. MIN. MAX.
inc Random Read or Write Cycle Time 135 - 155 - ', 185 - n5
IRMW Read-Modify-Write Cycle Time 190 - 210 - 250 - ns
tpc Fast Page Mode Cycle Time so - " - 65 - ns
tpmw 'vi',,),,',"'):,:'"'' Cycle Read-Modify- Itis - I10 - 130 - M
1m Attest Time from m - 75 - 85 - 105 m 9’11:
tcnc Access Time trom m - 25 ... 25 - 30 ns 9,14
UA Access Time from Column Address - M) - 45 - 55 n: 9,15
tcpA Access Time from m Precharge - " - so - 60 ns 9
IRA; m Pulse Width 75 10,000 85 10,000 105 10,000 n;
titasp m Pulse Width (Fast Page Mode) " 200,000 85 200.000 105 200,000 ns
mm m Hold Time 25 - 25 - 30 - ns
t(SH a; Hold Time [ 7S - 85 - 105 - rts
mm m Precharge to 117:; Hold Time 45 - so - so - m
toss m Pulse Width 25 10,000 25 10,000 30 10,000 ns
tttnc Column Address to m Lead Time At) - 45 - " - ns
tCWD H510 WT! Delay Time " " - 65 - ns 13
tiawty m ta WT? Delay Time 105 - IIS - 140 - ns 13
tawo Column Address to WW Delay Time 70 - " - 90 - ns 13
tcpwo m Precharge to W Delay Time 75 - 80 - " - ns 13
IOEA TR Access Time - " - 25 - 30 ns
tom '65 Command Hold Time 25 - 25 - 30 - n!
CAPACITANCE (Vcc = SV t10%, f=1MHz. Ta = 0-70oc)
SYMBOL PARAMETER MIN. MAX. UNIT
C” Input CapatitantetAtF-A9) - 5 p;
Ca Input CapacitanteiXM. m, m. tit) - 7 pF
Ca Input/Output Capatitancet1m1-ittM) - 7 pF
TC51440oAP/AJ/ASJ/AZ-70, TC51 440oAP/Ad/ASd/Az-8o
TC51 44OOAP/AJ/ASJ/AZ-1 o
NOTES:
I. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device.
All voltages are referenced to Vss.
Iccl, Icca, Icc4, Icca depend on cycle rate.
TCCI, Icc4 depend on output loading. Speeified values are obtained with the output open.
Column address can be changed once or less while RIS=v1L and CKS':vm.
9-???»
An initial pause of 200ys is required after power-up followed by 8 RES only refresh cycles before
proper device operation is achieved. In case of using internal refresh counter, a minimum of 8
CAS before BIS refresh cycles instead of 8 as only refresh cycles are required.
7. AC measurements assume hr=5ns.
8. Vm (min) and V11, (max) are reference levels for measuring timing of input signals. Also,
transition times are measured between Vm and Vn..
9. Measured with a load equivalent to 2 'ITL loads and lOOpF.
10 toretmax0 and tosztmax0define the time " which the output achieVes the open circuit condition
and are not referenced to output voltage levels.
11. Either tRCH or tang must be satisfied for a read cycle.
12. These parameters are referenced to m leading edge in early write cycles and to WRITE leading
edge in Read-Modify-Write cycles.
13. twcs, tawp, tcwn, tAWD and tcpwo are not restrictive operating pttrarneters. They are included
in the data sheet as electrical characteristics only. If twcsit twcs (min). the cycle is an early
write cycle and the data out pin will remain open circuit thigh impedance)through the entire cycle;
If tRwoEttRWD (min). tcwoiittcwD0nin0, tAwoittAwo0nin0 and tCPWDZtCPwn (min.)(Fast
Page Mode), the cycle is a Read-Modify-Write. cycle and the data out will contain data read from
the selected cell: If neither of the above sets of conditions is satisfied, the condition of the data
out(at access time)i is indeterminate.
14. Operation within the tRCD (max.) limit insures that tmdmax.) can be met.
tncn(max.)is specified as a reference point only: If men is greater than the specified taco(max.)
v limit, then access time is controlled by tCAC.
15. Operation within the tttADtmax0 limit insures that tmc (mine) can be met.
tmmh'nax.) is specified as a reference point only: If tRAD is greater than the specified tmp (max.)
limit, then access time is controlled by tAA.
TC51 4400AP/AJ/ASJ/AZ-70, TC51 4400AP/Ad/AS0/Az-80
TC51 4400AP/Ad/ASJ/Az-1 o
READ CYCLE
A0-A9 . COLUMN
u01 VoH----
~uoa vos---- DATA- OUT
Eil.. "H" or 'L'
TC51 44MAP/AJ/ASJ/AZ-70, TC51 4400AP/AJ/ASJ/Az--80
TC51 44o0AP/AJ/ASJ/Az-1 0
WRITE CYCLE (EARLY WRITE!
A0-A9 COtUM N
WRI I E
1/01 Ihr, - T I
DA A. N OPEN
*4/04 " -
ET. "H'' or "L"
TC514400AP/A0/ASJ/Az--70, TC51 4400AP/AJ/ASJ/Az--80
TC51 4400AP/AJ/ASJ/Az-1 0
WRITE CYCLEgUE CONTROLLED WRITE)
AO-AS? COLUMN
l/Ol . Ihr, -
DATA-IN
-ll04 " -
Eg.. "H" or "L''
TC51 440oAP/AJ/ASJ/Az--7o, TC51 4400AP/AJ/ASJ/Az-8o
TC51 4400AP/A0/ASJ/Az-1 0
READ-MODIFY-WRITE CYCLE
Vis: -
l/r, -.....
tas, tun tASC
ROW COLU MN
VIL --
ln/OH-d--
I/01 DATA-IN
~|/04 VI/OL ---
Eg.. "H" or "L"
TC51 44MAP/AJ/ASJ/AZ-70, TC51 4400AP/AJ/ASd/AZ-8o
TC51 440oAP/AJ/ASJ/Az--1 O
FAST PAGE MODE READ CYCLE
Ihr, ---
VII. ...-..-.
Eg.. "H" or 'L'
TC51 4400AiP/A0/AS0/Az--70, TC51 4400AP/AJ/ASJ/AZ-80
TC51 44MAP/AJ/ASJ/AZ-1 0
FAST PAGE MODE WRITE CYCLE
A0--A9
VIH _ A;'
" c:,',,!,,','!,,'',)'',,'),"
'ii'tiiii,i'i,c:
POI v." "
WV04 D N
Va. IN
Eil.. "H" or "C"
TC514400AP/AJ/ASJ/AZ--7o, TC51 44MAP/Ad/ASJ/AZ-80
TC51 4400AP/AJ/ASJ/Az-1 0
FAST PAGE MODE READ-MODIFY-WRITE CYCLE
vol-- Vvou -
U04 Msex -
'1 Dourl '2 Dour2 '3 DOUTN
gg.. "H" or "c"
TC51 44MAP/AJ/AS0/AZ-7o, TC51 44MAP/AJ/ASJ/AZ-8o
TC51 4400AP/A0/ASJlAz-1 o
m ONLY REFRESH CYCLE
m ll.-.. \ L_..,
m ::::+7: . "ic.y/r
A0-A9 :;:- new -- (iiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiiii)
N :WR1N,0E "H''or"L" r','fga..''reori'
m 1:: CC". L.v/7" " X truxs } " I.,
1:, - tCHtt 7
EAT '...._...y/?
" - . . 1
WWE (f: tfit;?, ' 3 77/77
'et, 1ltr."C."C.C.) OPEN
'ig,t, , "H" or "L"
TC51 4400AP/AJ/AS0/Az--70, TC51 4400AP/AJ/ASJ/Az-80
TC51 4400AP/AJ/ASJ/Az--1 o
HIDDEN REFRESH CYCLE READ
toms RC tm, V
m Ihr, \ / "N r.-,' " I
" - -‘_________,- -y L N
tcm, taco ‘nsu tom I ttro
p rh y-------
AAAAA 't :%ZU@
mrv,',:C'iii''i'ii 'iff' iikaaiizsizaiizzs
_ 'ala t0E2 V
IIOI VOH - -» a,-
.... V04 .--- DATA - OUT y------
VOL - - t :4-
byfd l "H" or 'L'
TC51 44o0AP/AJlASJ/Az--70, TC51 4400AP/AJ/ASJ/Az-80
TC51 44MAP/AJ/ASJ/AZ-1 0
HIDDEN REEFRESH CYCLE RITE
fl A bus 4 tet, tttp
V (RAE r
IH - \ / N '
VIL - "u-..-,.,.,.-,..,..-; c.-...,.-'-,-....,)? 'c,
t " t su t ttttr
,sct:rr_f 23%.. R V CHR j?
NimiTé IL" assasiiiici. sift,
6: 't WWW
'elm, 1:: L'-". 2 DATA-IN [xtiitititiiitiitttitiittiiEtititiitE
'itf,ff, .. "H" or "C"
TC51 4400AP/AJ/ASJ/Az-70, TC51 4400AP/Ad/ASJ/Az-80
TC51 4400AP/Ad/ASJ/Az--1 O
wa BEFORE FATS REFRESH COUNTER TEST CYCLE
Ath-A9 COLUMN
READ CYCLE
Wlil I t
U? VIN
L vol Von
~|I04 DATA . OUT
WRITE CYCLE
IIOI VIH -
L ~uoa OPEN DATA- m
READ-MODIFY-WRITE CYCLE “M"
~l/04 V DATA-IN
TA . OUT
ET. "H" or (
TC514400AP/A0/ASJ/Az--70, TC51 4400AP/AJ/AS0/Az-80
TC51 4400AP/Ad/ASJ/Az-1 0
WW, CIS BEFORE m REFRESH CYCLE
m " __/ 's,"
tcn tcsn
"o..-----
'ffff 'tite,
Note: UE, AO~A9='H' or "L"
Eg.. "H" or 'L'
TC51 4400AP/AJ/ASJ/AZ-70, TC51 4400AP/AJ/ASJ/AZ-80
TC51 4400AP/AJ/ASJ/Az-st o
TEST MODE
The TC514400AP/AJ/ASJ/AZ is the RAM organized 1,048,576 words by 4 bits, it is internally
organized 524,288 words by 8 bits. In "Test Mode", data are written into 8 sectors in parallel and
retrieved the same way. A0e is not used, If, upon reading, two" bits or} one I/O pin are equa1tall"1"s or
''0"s), the I/O pin indicates a"1".
If they were not equal, the 1/0 pin would indicate a“0". Fig.1'shows the block diagram of
TC514400APIAJ/ASJ/AZ. In 'Test Mode", the 1Mx4 DRAM can be tested as if it were a512Kx4
"WW, m Before m Refresh Cycle puts the device into'Test Mode". And“m Before EM
Refresh Cycle" or "m Only Refresh Cycle" puts it back into"Normal Mode". In the Test Mode,
"WRITE, CKS Before RES Refresh Cycle"Performs the refresh operation with the internal refresh
address counter. The "Test Mode"function reduces test times (1/2 in case of N test pattern).
TC51 4400AP/AJ/ASJ/Az-70, TC51 44MAP/AJ/ASJ/AZ--80
TC51 4400AP/Ad/ASJ/AZ-1 0
BLOCK DIAGRAM IN THE TEST MODE
Nc Vc cc
Nc A , Normal
Normal -"xsr--- 512K block r-oct-qi?)''"-'"
o------ E
V01 -"Nc, m 8 U01
Test ..c S12K block E ED Test
----o iNormal
------o I
A0: Vcc
AOC C 1Normal
Normal r'°\°_ 512K block & Test
o----. e
IIOZ h"irc" D V02
Test " 512K block "i Test
‘= ti _)-rc-)i,I,'ritii'i,-a-1
--"', iNormal
w---------.--"
A0: Vcc
Act E Normal
Nurmal "sd'------ SIZK block r-ED-ri",' l
th-----,. '
1/03 -oN, 3; F U03
Test - 512K block Test
''s.t' ' _hr-ir.-ci,'ii,iscii-t,,
- i Normal
Aoc Vcc
------o
A0: G 1Normal
Normal -'s6t----- SI2K block r-EDS----,".'',", I
th------ 13
V04 ‘ATC H U04
Test 512K block " Test
'st' n .)r-?-r:Dr'iiisiawi,
----o Normal
Fig. 1
www.ic-phoenix.com
.
