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TC74HC4538AFN , DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR
TB62705CF
8BIT SHIFT REGISTER, LATCHES & CONSTANT CURRENT DRIVERS
TOSHIBA
T362705CP/CF/CFN
TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB62705CP, TB62705CF, TB62705CFN
SBIT SHIFT REGISTER, LATCHES & CONSTANT CURRENT DRIVERS
The TB62705CP/CF/CFN are specifically designed for LED
and LED DISPLAY constant current drivers.
This constant current output circuits is able to set up
external resistor (lOUT=5--90mA).
This IC is monolithic integrated circuit designed to be used
together with Bi-CMOS process.
The devices consist of 8bit shift register, latch, AND-GATE
& Constant Current Drivers.
FEATURES
. Constant Current Output : current with one resistor for
5 to 90mA.
0 Maximum Clock Frequency : fCLK=15 (MHz)
(Cascade Connecte Operate,
Topr=25°C)
0 5V C-MOS Compatible Input
0 Package : DlP16-P-300-2.54A (TB62705CP)
SSOP16-P-225-1.00A (TB62705CF)
SSOP16-P-225-0.653 (TB62705CFN)
o Constant Output Current Matching :
TB62705CP
MPI 6-P-300-2. 54A
TB62705CF
SSOP16-P-225-1.00A
TB62705CFN
SSOP16-P-225-0.65B
OUTPUT-GND CURRENT
VOLTAGE MATCHING OUTPUT CURRENT
2 0.4V i 6.0% 5~40mA
Z 0.7V i 6.0% 5--90mA
Weight
DIP16-P-300-2.54A : 1.11g (Typ.)
SSOP16-P-225-1.00A: 0.14g (Typ.)
SSOP16-P-225-0.65B : 0.07g (Typ.)
961001EBA1
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within sdecified
operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual propert or other rights of the third
parties which may result from its use. No license is granted by implication or ot erwise under any intellectual
1998-06-11 1/14
TOSHIBA TB62705CP/CF/CFN
PIN CONNECTION (Top view)
GND t 1 V 16 l VDD
SERIAL-IN r 2 15 JR-EXT
CLOCK r 3 14 JSERIAL-OUT
TTCH t 4 13 JW
OUTOI: 5 12 101117
OUT1 t 6 11 JOUTs
ou12[ 7 10 JOUTS
OUT3 r 8 9 JOUT4
BLOCK DIAGRAM
OUTO OUT1 OUT7
R-EXT o- I-REG.
EN-LEO-i),
LAT-CHO-ics l I - I
sERvu-uNo-2> D Q D Q - D Q OSERIAL-OUT
> CK > CK > CK
CLOCK o-t> , , - _l-
TIMING DIAGRAM
CLOCK Flu-lu-lu-lu-lu-lu-lu-l 5V
I l l I 5V
SERIAL-IN
I I rin I rin I r? I ov
LATCH I I I I I I I I Fl ov
I I I I I I 1 l 5V
ENABLE ' ' ' '
I I I I I I I I l-l ov
I t I I t I I t I I
OUTO I I I I I I I I I I
I I I I I I I I g,'
0UT1 I I I I I I l I n
I I I I 1 I l I Off
I I I I I I I I I t On
OUT3 I I I I I I I I I t Off
I I I I I I I I I I I
I I I l I I I I I I I
I I I I I I I I I I I
ow I I I I I I I I I- On
I I I I I I I I ' l Iff
SERIAL-OUT WW xf!'" 1/ / /hClh( A I I 0V
i I i I t
(Note) Latches are level sensitive, not rising edges sensitive and not syncronus CLOCK.
Input of LATCH-terminal to H Level, data passes latches, and input to L level, data
hold latches.
Input of ENABLE-terminal to H level, all output (OUTO~7) do off.
1998-06-11 2/14
TOSHIBA TB62705CP/CF/CFN
TERMINAL DISCRIPTION
PIN No. PIN NAME FUNCTION
1 GND GND terminal for control logic.
2 SERIAL-IN Input terminal of a serial-data for shift-register.
3 CLOCK Input terminal of a clock for data shift to up-edge.
4 -L)TT"tTf nput terminal of a data strobe. Latches passes data with "H" level input of
m-terminal, and hold data with "L'' level input.
5--12 OUTO--7 Output terminals.
Input terminal of output enable. All outputs (OUTO~7) do off with "H" level
input of ENABLE-terminal, and do on with "L'' level input.
14 SERIAL-OUT Output terminal of serial-data for next SELIAL-IN terminal.
13 ENABLE
15 R-EXT Input terminal of connects with a resister for to set up all output current.
16 VDD 5V Supply voltage terminal
TRUTH TABLE
CLOCK LATCH ENABLE SERIAL-IN OUTO ... OUTS ... OUT7 SERIAL-OUT
UP H L Dn Dn ... Dn-5 ... Dn-y Dn-7
UP L L Dn +1 No change Dn-6
UP H L Dn+2 Dn+2 ... Dn-3 ... Dn-5 Dn-5
DOWN X L Dn + 3 Dn + 2 ... Dn-3 ... Dn-5 Dn-S
DOWN X H Dn + 3 Off Dn-5
(Note) OUTO--7=on in case of Dn=H level and OUTO--7=off in case of Dn=L
level.
A resistor is connected with R-EXT and GND accompanied with outside,
and it is necessary that a correct power supply voltage is supplied.
EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS
1. "t"Tirh"'lTL""t" terminal 2. f7i"rtTif terminal
VDD cr- VDD Cr-
ENgiLEty- LAT-CHt:y-
GND GNDCY-
3. CLOCK, SERIAL-IN terminal 4. SERIAL-OUT terminal
VDD Tu VDD
_.I 1:
::;:::.N- E‘XTB’LTC”{ -4DSERIALuDUT
GND L] GND
1998-06-11 3/14
TOSHIBA T362705CP/CF/CFN
MAXIMUM RATINGS (Ta=25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage VDD 0--7.0 V
Input Voltage VIN -0.4--VDD+0.4 V
Output Current IOUT 90 mA
Output Voltage VCE -0.5--17.0 V
Clock Frequency fCK 15 MHz
GND Terminal Current IGND 720 mA
Power Dissipation PD 1.47 (CP-type : FREE AIR, Ta=25°C) W
0.78 (CF/CFN-type : ON PCB, Ta =25°C)
. 85 (CP-t e : FREE AIR, Ta=25°C) o
Thermal Resistance Rth(j-a) 160 (if/Tidy",',:, : ON PCB, Ta=25°C) C/ W
Operating Temperature Topr -40-85 "C
Storage Temperature Tstg - 55~150 ''C
(Note) CP type : Ambient temperature deleted above 25°C in the proportion of 11.8mW/°C
Ambient temperature deleted above 25°C in the proportion of
CF and CFN type :
6.3mW/°C
RECOMMENDED OPERATING CONDITION (Ta-- -40--85oc unless otherwise noted)
CHARACTERISTIC SYMBOL CONDITION MIN. TYP. MAX. UNIT
Supply Voltage VDD - 4.5 5.0 5.5 V
Output Voltage VOUT - - - 15.0 V
lo OUTn, DC 1 circuit 5 - 88
Output Current IOH SERIAL-OUT - - 1.0 mA
IOL SERIAL-OUT - - - 1.0
VIH - $17 - ngB
Input Voltage DD + . V
VIL - -0.3 - 0.3
LATCH Pulse Width tw LAT 100 - - ns
CLOCK Pulse Width tw CLK 50 - - ns
ENABLE Pulse Width tw EN 4500 - - ns
Set-up Time for DATA tsetup(D) VDD=4.5--5.5V 60 - - ns
Hold Time for DATA thold (D) 20 - - ns
Set-up Time for LATCH tsetupm 100 - - ns
Hold Time for ENABLE thold (L) 60 - - ns
Clock Frequency fCK Cascade operation 10.0 - - MHz
Ta =85°C (CP-type FREE AIR) - - 0.82
Power Dissipation PD Ta =85°C - - 0 40 IN
(CF/CFN-type ON PCB) .
1998-06-11 4/14
TOSHIBA T362705CP/CF/CFN
ELECTRICAL CHARACTERISTICS (VDD = 5.0V, Ta = 25°C unless otherwise noted)
CHARACTERISTIC SYMBOL CIR- CONDITION MIN. TYP. MAX. UNIT
" " 0.7
Input H Level VIH - - VDD - VDD V
Voltage 0.3
"L'' Level VIL - - GND -
Output Leakage Current IOH - VOH =15.0V - - 10 ,aA
Output VOL - IOL =1.0mA - - 0.4
Voltage S-OUT VOH - 'OH = -1.0mA 4.6 - - V
IOL1 - VCE =0.7V REXT=4700 34.1 40.0 45.9
Output Current 1 IOLZ - VCE=0.4V (Include skew) 33.7 39.5 45.3 mA
Io =40mA,
- = - + + 0
Current Skew A|0L1 VCE = 0.4V REXT 4700 - 1.5 - 6.0 A)
IOL? - VCE=0.7V REXT=2500 64.2 75.5 86.8
Output Current 2 IOL4 - VCE=O.4V (Include skew) 63.8 75.0 86.2 mA
Io = 75mA,
- = - + + a
Current Skew AIOLZ VCE = 0.7V REXT 2500 -+1.5 - 6.0 A)
Supply Voltage o - - '.- o 0
Regulation hl IVDD - REXT--470n, Ta - 40 85 C - 1.5 5.0 hl /V
Pull-Up Resistor RiN(up) - - 150 300 600 n
Pull-Down Resistor RIN (down) - - 100 200 400 n
IDD(off)1 - REXT=OPEN, OUT1--8=off - 0.6 1.2
S I "OFF" IDD (off) 2 - REXT = 4700, OUT1--8 = off 3.5 5.8 8.0
C3353: IDD (off) 3 - REXT=2500, OUT1~8=off 6.5 10.7 15.0 mA
"ON" IDD (on) 1 - REXT=4700, OUT1--8=on 7.0 12.0 18.0
IDD(on) 2 - REXT=2500, OUT1--8=on 10.0 22.0 32.0
1998-06-11 5/14
TOSHIBA TB62705CP/CF/CFN
SWITCHING CHARACTERISTICS (Ta=25°C unless otherwise noted)
CHARACTERISTIC SYMBOL CIR- CONDITION MIN. TYP. MAX. UNIT
. SIN-OUTn - 1200 1500
'lr2'(,"rai,t,i,1n LATCH-OUTn t - 1200 1500
”e y ',,",lt, ENABLE-OUTn pLH - - 1200 1500 ns
( L to H )
CLK-SOUT - 30 70
. SlN-OUTn - 700 1000
PDrcipagTétm” LATCH-OUTn t 1/DD=5.0V - 700 1000
(,,:fyto'TL‘i) W-OUTn PHL - VCE =0.4V - 700 1000 ns
CLK-SOUT x'H 153 - 30 70
CK t - - 20 30
Pulse Width W CLK REXT=47OQ ns
LATCH tw LAT - IOUT=40mA - 10 25
Set-Up Time for L-H V =3 0V - 25 50
tsetup - L= . ns
Hold Time for L-H C =10 5 F - 0 30
- L= . p
LATCH H-L thold - 0 30 ns
Maximum CLOCK Rise Time tr - - - 10 ,us
Maximum CLOCK Fall Time tf - - - 10 ps
Output Rise Time tor - 300 600 1000 ns
Output Fall Time tof - 150 300 600 ns
1998-06-11 6/14
TOSHIBA TB62705CP/CF/CFN
TEST CIRCUIT
DC characteristic
OUTO D-o
o-C. ENABLE , '
IPL, llH "-t :CLOCK :
- o-tC) LATCH OUT7 D-o
SERIAL-IN SERIAL-OUT D-o
VIL, VIH
R-EXT GND
AC characteristic
VDD RL
VIH VIL OUTO W
- -C) ENABLE E |_-
SW-MATRIX C CLOCK g
-(2 LATCH OUT7 (J,)-:::,-.
-C SERIAL-IN SERIAL-OUT
R-EXT GND
E T icl- “I
Utmost care is necessary in the design of the output line, VCC (VDD) and GND line since IC may be
destroyed due to short-circuit between outputs, air contamination fault, or fault by improper
grounding.
PRECAUTIONS for USING
1998-06-11 7/14
TOSHIBA TB62705CP/CF/CFN
TIMING WAVEFORM
1. CLOCK-SERIAL OUT, OUTn
tsetup thold
SERIAL IN £50% 150%
SERIAL OUT,
OUTn (current)
tpLH tpHL
2. CLOCK-LATCH
CLOCK [50%
SERIAL IN X X
- "L" level=DATA HOLD
LATCH $5006
tsetu p
3. ENABLE-OUTn
ENABLE 50% / 50%
tpLH tpm,
OUTn 50% 50%
1998-06-11 8/14
TOSHIBA
IOUT - Duty Cycle (TB62705CF/CFN)
vo =0.4 (v)
c vo =0.7 (V)
1:: 60 vo = 1.0 (v)
VDD = SV
20 Tj-- 120°C (Max.)
8bit Active
0 Ta = 25°C
0 20 40 60 80 100
Duty Cycle (%)
'OUT - Duty Cycle (TB62705CF/CFN)
V =0.4 (V)
.73 vo = 0.7 (V)
cf.?. 60
v = 1.0 v
VDD-- 5V C) ( )
20 Tj= 120°C (Max.)
8bit Active
0 Ta = 85°C
0 20 40 60 80 100
Duty Cycle (%)
IOUT - Duty Cycle (TB62705CP)
vo = 0.4 (v)
T? vo =0.7 (V)
?? 60 Vo-- 1.0 (v)
VDD = 5V
Tj = 120°C (Max.)
8bit Active
Ta = 25°C
0 20 40 60 80 100
Duty Cycle (%)
(mA / bit)
(mA/bit)
IOUT (mA / bit)
T362705CP/CF/CFN
IOUT - Duty Cycle (TB62705CF/CFN)
V = 0.4 (V)
V =th7
V =1.0 (V)
VDD = 5V
Tj=1ZO°C (Max.)
8bit Active
Ta = 60°C
0 20 40 60 80 100
Duty Cycle (%)
IOUT - Duty Cycle (TB62705CP)
V = 0.4 (V)
60 vo = 0.7
vo = 1.0(V)
VDD = SV
20 T] = 120°C (Max.)
8bit Active
0 Ta = 85''C
0 20 40 60 80 100
Duty Cycle (%)
IOUT - Duty Cycle (TB62705CP)
vo = 0.4 (V)
vo = 0.7 (V)
vo = 1.0 (V)
VDD = SV
20 Tj = 120°C (Max.)
8bit Active
0 Ta = 60°C
0 20 40 60 80 100
Duty Cycle (%)
1998-06-11 9/14
TOSHIBA TB62705CP/CF/CFN
LED DRIVER TB6270X SERIES APPLICATION NOTE
REXT - IOUT Ta - PD
100 1.6
90 IOUT:{1_26/REXT (Q)}x14.7 1 4
"s 1.2
< 60 I
50 .9 0.8
S) 40 I,':' 0.6
20 g 1:CF/CFN ON PCB -
10 0.2 2:CF/CFN FREE AIR-
0 3 : CP FREE AIR -
200 300 500 1,000 2,000 3,000 5,000 -40 -20 0 20 40 60 80
REXT (Q) Ambient Temperature Ta (°C)
Fig. 1
1998-06-11 10/14
TOSHIBA TB62705CP/CF/CFN
[1] Output current (IOUT)
'OUT is set by the enternal resistor (R-EXT) as shown in Fig1.
[2]Tota| supply voltage (VLED)
This device can operate 0.4--0.7V (V0).
When a higher voltage is input to the device, the excess voltage is consumed inside the device, that
leads to power dissipation.
In order to minimize power dissipation and loss, we would like to recommend to set the total
supply voltage as shown below,
VLED (total supply voltage) =VCE (Tr Vsat) +Vf (LED Forward voltage)+Vo (Ic supply voltage)
When the total supply is too high considering the power dissipation of this device, an additional R
can decrease the supply voltage (V0).
PATTERN LAYOUT
VLED = 3--4 (V)
SCAN _
n - OUTO
'\_/ ENABLE '
C) CLOCK I
C) LATCH l
I it R
" OUT7 )—
"N..p SERIAL-IN
R-EXT GND SERIAL-OUT
CPU ( i Q) 7)
' 1L f ,
c, ENABLE OUTO D
--C.h, CLOCK E
n -r-r-- I
u.' LATCH :
-C SERIAL-IN OUT7 C)
R-EXT GND SERIAL-OUT
[3] Pattern layout
This device owns only one ground pin that means signal ground pin and power ground pin are
common.
If ground pattern layout contains large inductance and impedance, and the voltage between
ground and LATCH, CLOCK terminals exceeds 2.5V by switching noise in operation, this device may
miss-operate. So we would lile you to pay attention to pattern layout to minimize inductance.
1998-06-11 11/14
TOSHIBA TB62705CP/CF/CFN
OUTLINE DRAWING
DlP16-P-300-2.54A Unit : mm
CII-nr-nr-ll-ll-lr-nr-I
N-''''-'''--''''---"'
6.4i0.2
V 19.75MAX "
19.25i0.2 V.
“L 'R-r:
it] iii,'
.515” Q
g b I cr?
0.735TYP . 10.1 0.25
Weight : 1.11g (Typ.)
1998-06-11 12/14
TOSHIBA T362705CP/CF/CFN
OUTLINE DRAWING
SSOP16-P-225-1.00A Unit : mm
16 9 -
H H I? H H Pl Fl H " . A?
CN “2 N :23
'R fi?, ts. J?
(D 10 LO N
C) mt' ar" e;
' tl ' ' ld ld ld ld IL "-
0.6TYP . A 0.4io.1 f
---. "l r \
H. 8.7MAX H,
" 8.2i0.2 M g
(Y M gg
$1 a 12
10" 031 r-
'I......:...-?...,, ,d d !
o" JL....,.-.
5,li' ' ‘o.525io.2
Weight : 0.14g (Typ.)
1998-06-11 13/14
TOSHIBA
OUTLINE DRAWING
SSOP16-P-225-0.6SB
T362705CP/CF/CFN
Unit : mm
flfrfNlW
6 4i0 3
(225ml)
5.5MAX
I I I _
_ MI MI ____.___
0.23TYP a , 0.22:0.1
Weight : 0.07g (Typ.)
1998-06-11 14/14
www.ic-phoenix.com
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