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TA8851CNTOSHIBAN/a7595avaiAUDIO/VIDEO SWITCH IC FOR TV WITH S-TERMINALS


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TA8851CN
AUDIO/VIDEO SWITCH IC FOR TV WITH S-TERMINALS
TOSHIBA TA8851CN
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC
TA885MCN
AUDIO/VIDEO SWITCH IC FOR TV WITH S-TERMINALS
The TA8851CN is an A/V SWITCH IC, which has 7 input
channels and 2 output channels. Because the 2 output
channels can be switched independently of each other,
the TA8851CN allows you to configure a PIP system input
switching circuit easily. _---"
The TA8851CN can be interfaced easily to a
microcontroller via the IZC bus.
3 of 7 input channels can be used for Y/C separated
input.
C, Wiiiiiiiiiiiiii
FEATURES SDIP54-P-600-1.78
Weight : 1.0g (Typ.)
Video Stage
0 Input
Composite video input : 7 channels
Y/C input : 3 channels
o Output
Composite video output .' 2 channels (Main and Sub)
Y/C output : 2 channels (Main and Sub)
Audio Stage
0 Input
L/R input : 7 channels
It Output
L/R output : 3 channels (2 of 3 depend on video, and the other is selectable
from Main or Sub)
Functions
o IZC bus interface
External mute circuit
DAC output (3 outputs)
Video clamp circuit
Mode output
ADC input (4 inputs)
961001EBA2
O TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can
malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing
TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss
of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent products specifications Also, please keep in mind the precautions and conditions set forth in the
TOSHIBA Semiconductor Reliability Handbook.
1997-04-07 1/45
TOSHIBA
TA8851CN
BLOCK DIAGRAM
CLAMP1
CLAMP?
961001EBA2'
O The products described in this document are subject to foreign exchange and foreign trade control laws.
b implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
0 T e information contained herein is subject to change without notice.
O The information contained herein is presented only as a guide for the ap lications of our products. No responsibility is assumed by TOSHIBA
CORPORATION for any infringements of intellectual property or other rights D the third parties which may result from its use. No license is granted
1997-04-07 2/45
TOSHIBA TA8851CN
TERMINAL CONNECTION DIAGRAM
I/OI (iii Dscr
I/oz@ DSDA
cin2@ @Mute
o3@ DGND2
cout2@ @cins3
Rout2@ ®Rins3
Yout2@ @Yin53
Lout2@ Duns?
vout2@ @vins3
CLAMP2@ Dvcc
Yin2@ Dcinsit
RoutD@ @Rinsz
cin1@ @Yinsz
LoutD@ @Linsz
Cout1@ Dvins2
Rout1@ DGNOI
Yout1@ @cins1
Lout1@ @Rinm
vout1@ @Ymm
CLAMP1@ ®Lin51
Yin1@ 3mm
RinE3@ @RinE1
VinE3@ ®vin51
LinE3@ @Linm
RinE4@ @RinEz
vin54@ @vinEz
LinE4@ :DLinEZ
1997-04-07 3/45
TOSHIBA TA8851CN
TERMINAL FUNCTION
PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT
These pins are for 2:
composite video signal 5
input. 1
The recommendable
input level is 1.0Vp-p.
2 :VinE2 Composite Video
5 :VinE1 Signal Input
5.3V 30k
These pins can be :r E
. 500 ,
Composite Video u-sed _ composite Ow" Jr-
50 : VinE3 Si naI/Y Si nal video signal or Y 50
53 : VinE4 mg ut g signal input. 53
p The recommendable .
input level IS 1.0Vp-p. ($2 ($2 ($2
These pins are for
composite video signal
input and S mode
Switch.
By setting DC voltage
of one of these pins
lower than 2.6V, that
channel (S1, S2 or S3)
turns to S-mode. And
when it is higher than
2.6V, that pin is for
composite video input.
The recommendable
input level is 1.0Vp-p.
7 : VinS1 Composite Video
13 : VinS2 Signal Input and
19 : VinS3 S-Mode Switch
1997-04-07 4/45
TOSHIBA
TA8851CN
PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT
These pins accept a Y
9 : Yin51 signal fjomdthe S-
15 : YinS2 termilna an a C
21 : YinS3 Y Signal Input/ Il',", as mp”: d
11 : CinS1 C Signal Input . e rec.°m"l“i" el .
17 : CinS2 angst Signa eye IS
23 : C; S3 . p-p orysignal
1n and 300mVp-p for C
signal (burst).
These pins accept the
sound of the internal -
TV signal as input. g;
The signal input to 7: 05
this pin is output from 011900 15k il
4 : L; E1 . the main/sub output c;
6 : Rli2E1 Audio Input (TV) after being selected, 2 7: is":
as well as from the TV >
audio output terminal. 2 <
The recommended I (£5
input signal level is ' . d,
300mVrms.
These pins accept an
audio signal as input.
They also accept input 5;;
from a 1bit ADC. In K 'e,
. this case, if the 1099 14hs G
52 : RinE4 fuu,t'2l'tut/ voltage on these pins 92"" c: 2151(5)
54 : LinE4 is below 2.3V the ADC 54 i it,
outputs I3 and u >
become logic is. I' <
The recommended i E
input signal level is . . d,
300mVrms.
8 : Lins1 8
10 : RinS1 10
14 : LinS2 These pins accept an l'
16 : RinS2 dio si nal as in ut 20 1009
20 : LinS3 A di au g p . 22
22 : R; S3 u IO Input The rec-ommended- ;
1 : LiI:E2 input signal level IS 51 >
3 : RinE2 300mVrms. 49 :3 < <
51 : LinE3 E i,
49 : RinE3 a', d,
1997-04-07 5/45
TOSHIBA
TA8851CN
PIN No.
PIN NAME
FUNCTION
INTERFACE CIRCUIT
25 : Mute
If the voltage on this
pin is above 1.5V, all
audio outputs (main,
sub, and TV) are
disabled.
46: vout1
36 : Vout2
Monitor Output
These pins output the
selected composite
signal.
The standard output
signal amplitude is
These pins can sink a
maximum current of
3.0mA.
2009 ii-
2r ol OE.
CLAMP1
CLAMP2
Clamp Filter
These pins are a filter
terminal for the clamp
circuit to maintain the
monitor output at a
constant DC level.
If these pins are tied
to GND, the clamp
circuit is disabled, so
that the DC voltage of
the monitor output
cannot be clamped to
a constant level.
37 2000
48 : Yin1
40 : Cin1
38 : Yin2
30 : Cin2
Comb Y/C Input
These pins accept a
Y/C separated signal
from the comb filter
as input.
The recommended
input signal level is
2.0Vp-p for Y signal
and 600mVp-p for C
signal (burst).
1997-04-07 6/45
TOSHIBA
TA8851CN
PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT
These pins output the
Y and C signals that
are fed to the V/C/D
circuits. S,
44 : Yout" The standard output Fe "
42 : Cout1 signal level is 2.0Vp-p x 2009
Y/C Output . 44
34 : Youtz for Y signal and 42
32 : Cout2 600m1/p-p for c signal 3‘; < <
(burst). lr C E C F,
These pins can sink a N CY
maximum current of
2.5mA.
These pins are for -
input and output to 1:
and from the 1bit 280 A. >
28 : l/OI l/O DAC/ADC of the bus 29 Jeu'
29 : l/O2 signal. ADC
These pins can source I: " DAC
a maximum current of
2.0mA.
This pin is for output
of the 1bit DAC of the gr
bus signal.
31 . O3 O3 This pin can source a G
maximum current of 7: >1
2.0mA.
26 : SDA These pins are for 26 1009 it.
27 : SCL SCL/SDA input of the PC bus. 27 JA
3: i' EOUtZZ These pins output an S'
39 , ROUtD audio signal. 33 x
41 .' LOUtD Audio Output These pins can sink a :3 g
43 . ROUt1 maximum current of 41 ct E
: out 43 s' ' <
45 : Lout1 1.4mA. 45 qr s205
1997-04-07 7/45
TOSHIBA
ADDRESS MAP
TA8851CN
(Slave address 90H, 91H)
MODE DATA No. DATA
D07 Does Dos l D04 l D03 D02 D01 l Doo
DAC Output Sound Sound Mute
Data 1 .
- Selection
(0) (1) (1) (1) (1) (1)
. D17 I D16 D15 l D14 D13 D12 D11 I D10
Write [(1:25 Y/C Output Switching F.VIDEO Output Switching
(0) (0) (0) (0) (0) (0) (0) (0)
Data 3 D27 l D26 l D25 I D24 D23 D22 l D21 l D20
(sub) Y/C Output Switching F.VIDEO Output Switching
(0) (0) (0) (0) (0) (0) (0) (0)
D37 I D36 I D35 I D34 D33 D32 l D31 D30
Read Data 4 ADC Ident S Input Ident P.O.R
(0) (0) (0) (0) (0) (0) (0) (1)
F.V|DEO : Forced video mode
P.O.R : Power On reset (power : ON (1))
(0) (1) : preset
1997-04-07 8/45
TOSHIBA TA8851CN
© Write mode
Output switching (main)
MODE BUS DATA s INPUT OUTPUT SIGNAL
D D D R 1
E1 1 R
E2 1 . R' E2
E3 0 . R. E3
E4 0 R' E4
Output switching (sub)
MODE BUS DATA S INPUT OUTPUT SIGNAL
D D R 2
. . E1
1997-04-07 9/45
TOSHIBA
Y/C output switching (main)
MODE BUS DATA OUTPUT SIGNAL
D17 D16 D15 D14 Yout1 Cout1
S-terminal Input 1 1 YinS?
Video Input EXCEPT 1 0 Vout1
Comb1 o o o 1 Yin1 -
Come 0 o VinE3
S-terminal Input 1 1 CinS?
Video Input 1 O - - - Vout1
Comb o 1 cin1
Mute 0 0 - - Mute Mute
?: 1--3(SY1, sc1‘6iiiéR)
Y/C output switching (sub)
MODE BUS DATA OUTPUT SIGNAL
D27 D26 D25 D24 YoutZ Cout2
S-terminal Input 1 1 YinS?
Video Input EXCEPT 1 o Vout2
Comb1 o o o 1 Yin2 -
Come 0 o VinE4
S-terminal Input 1 1 CinS?
Video Input 1 0 - - - Vout2
Comb 0 1 Cin2
Mute 0 0 - - Mute Mute
?: 1--3(SY2, SC2 "C%lil)
TA8851CN
TOSHIBA
TA8851CN
Mute mode
BUS VIDEO OUTPUT SOUND OUTPUT
MODE PIN 25 MAIN SUB MAIN SUB Dual
Yout1 Yout2 Routl Rout2 RoutD
BIT DATA Vout1 cout1 Vout2 cout2 Loutl Lout2 LoutD
Ext Mute - - lg - - - - Mute Mute Mute
Sound Main D00 1 - - - - - Mute - -
Mute SW Sub D01 1 - - - - - - Mute -
(e Main D11 0 - Mute - - - Mute - -
E D12 0
tit Video & 20
-t, Sound Sub 321 g - - - Mute - - Mute -
g Mute sw Y/C ce, 0
Main D15 0 - - Mute - - - - -
Y/C D24 0
Sub D25 o - - - - Mute - - -
DAC output Dual Sound Selection
BUS BUS OUTPUT
TERMINAL BIT DATA OUTPUT MODE BIT DATA RoutD LoutD
1 Open Main Main
l/OI D03 0 Low level MAIN D02 Sound Sound
1 Open 0 Sub Sub
l/O2 D04 0 Low level SUB Sound Sound
1 Open
03 D05 0 Low level
© Read mode
S-Output ident ADC ident
BUS BUS
TERMINAL INPUT BIT DATA TERMINAL INPUT BIT DATA
VinS1 D31 l/O1 H D34 0
V; S2 D l/O2 L D 1
m 32 H 35 0
Vi S3 D I3 L D 1
In 33 H 36 0
I4 L D 1
H 37 0
1997-04-07 11/45
TOSHIBA
MODE EXPLANATION

© Cin C D Yin
Ci)-l'int : D Cin
ea Ci)
VinE3 C Cyst-- Ci)
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