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TA8851-TA8851BN
AUDIO/ VIDEO SWITCH IC FOR TV WITH S-TERMINALS
TOSHIBA
TA8851BN/CN
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC
TA8851l BN, TA8851 CN
AUDIO/VIDEO SWITCH IC FOR TV WITH S-TERMINALS
The TA8851BN/CN is an A/V SWITCH IC, which has 7
input channels and 2 output channels. Because the 2
output channels can be switched independently of each
other, the TA8851BN/CN allows you to configure a PIP
system input switching circuit easily. -
The TA8851BN/CN can be interfaced easily to a _-------"
microcontroller via the " bus. "-,
3 of 7 input channels can be used for Y/C separated
input.
FEATURES
Video Stage
It Input
Composite video input
Y/C input
0 Output
Composite video output
Y/C output
Audio Stage
0 Input
L/R input
0 Output
L/R output
Functions
0 " bus interface
External mute circuit
DAC output (3 outputs)
Video clamp circuit
Mode output
ADC input (4 inputs)
b,' f-, __-i-C-_-Cs-i-iii-i-iii-iii/ii/ii""''
SDIPS4-P-600-1.78
Weight : 1.0g (Typ.)
channels
channels
channels (Main and Sub)
channels (Main and Sub)
channels
channels (2 of 3 depend on video, and the other is selectable
from Main or Sub)
980910EBA2
O TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can
malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing
TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TOSHIBA product could cause loss
of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the
TOSHIBA Semiconductor Reliability Handbook.
0 The products described in this document are subject to the foreign exchange and foreign trade laws.
0 The information contained herein is presented only as a guide for the ap Iications of our products. No responsibility is assumed by TOSHIBA
CORPORATION for any infringements of intellectual property or other rights o the third parties which may result from its use. No license is granted
h implication or otherwise Under any intellectual property or other rights of TOSHIBA CORPORATION or others.
0 T e information contained herein is subject to change without notice.
2000-03-03 1/46
TOSHIBA TA8851BN/CN
BLOCK DIAGRAM
TA8851BN
VinE1 Voutl
VinE2 CLAMP1
VinE3 Yinl
VinE4 Yout1
VinSl Cout1
VinS2 Cin1
Vin$3 Vout2
YinS1 CLAMP2
YinS2 Yin2
Yins3 YoutZ
CinS1 Cout2
CinS2 Cin2
Cin53 RoutTV
RinE1 LoutTV
RinE2 Routl
RinE3 Rout2
RinE4 Lout1
RinSl Lout2
RinSit l/OI
RinS3 cu [/02
LinE1 t 03
LinE2 - SCL
LinE3 SDA
LinE4 Mute
Lin$1 VCC
LinS2 GND1
LinS3 GND2
2000-03-03 2/46
TOSHIBA TA8851BN/CN
BLOCK DIAGRAM
TA8851CN
VinE1 vout1
vinez CLAMP1
VinE3 Yinl
VinE4 Yout1
vins1 cow
VinS2 Cin1
Vin$3 Vout2
YinS1 CLAMP2
YinS2 Yin2
Yins3 YoutZ
CinS1 Cout2
CinS2 Cin2
CinS3 RoutD
RinEl LoutD
RinE2 Rout1
RinE3 Rout2
RinE4 Loutl
RinS1 Lout2
RinSit l/OI
RinS3 cu [/02
LinE1 t 03
LinE2 - SCL
LinE3 SDA
LinEll Mute
Lin$1 VCC
LinS2 GND1
LinS3 GND2
2000-03-03 3/46
TOSHIBA TA8851BN/CN
TERMINAL CONNECTION DIAGRAM
|/O1@ DSCL
I/oz@ DSOA
Cin2 @ @Mute
03@ DGND2
cout2@ Dcinse
Rout2@ @Rin53
Yout2@ @Yins3
Lout2@ Dunss
vout2@ @vins3
CLAMP2@ Dvcc
Yin2@ @cinsz
RoutD@ @Rinsz
cin1@ Dvins2
LoutD@ @Linsz
cout1 Cii: Dvins2
Row Ci DGNrr1
Yout1 C4i @cinm
Lout1@ @Rins1
vow Ciii @vinm
CLAMP1@ @Linm
Yinl (fi? :DVinS1
RinE3@ @Rinm
vin53@ @vinm
LinE3@ DLinEI
RinE4@ ®RinE2
VinE4@ ®Vin52
LinE4@ ©LinE2
2000-03-03 4/46
TOSHIBA TA8851BN/CN
TERMINAL FUNCTION
PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT
These pins are for
composite video signal
input.
The recommendable
input level is 1.0Vp-p.
2 :VinE2 Composite Video
5 :VinE1 Signal Input
These pins can be i: t,
Composite Video used fer composite Cy-Wy 5
50 : VinE3 Signal/Y Signal video signal or Y 50 x
53 : VinE4 Input signal input. 53
The recommendable '
input level is 1.0Vp-p. (é; (é; Ci):
These pins are for
composite video signal
input and S mode
Switch.
By setting DC voltage
of one of these pins
lower than 2.6V, that
channel (SI, S2 or S3)
turns to S-mode. And
when it is higher than
2.6V, that pin is for
composite video input.
The recommendable
input level is 1.0Vp-p.
7 : VinS1 Composite Video
13 : VinS2 Signal Input and
19 : VinS3 S-Mode Switch
2000-03-03 5/46
TOSHIBA
TA8851BN/CN
PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT
These pins accept a Y
9 I Yin51 Signal from the S- 9
terminal and a C 15 son
15 : YinS2 si nal as input 21
21 : YinS3 Y Signal Input/ g . 11
. The recommended 17
11 : CinS1 C Signal Input . . . 23
input signal level IS
23 . C; S3 1.0Vp-p for Y signal
. 1n and 300mVp-p for C
signal (burst).
These pins accept the
sound of the internal -
TV signal as input. g:
The signal input to 7r 'fe
this pin is output from (31299 135;) al'
4 : LinE1 . the main/sub output Vw S
A I TV . x
6 :RinE1 udio nput( ) after being selected, 2 lr g
as well as from the TV >
audio output terminal. I' <
The recommended i 5
input signal level is . I 6
300mVrms.
These pins accept an
audio signal as input.
They also accept input 5:
from a 1bit ADC. In x 0c
. this case if the 1000 1.514) G
A I ' . ( >va -w E
52 : RinE4 tgt, nftut/ voltage on these pins 52 Cl
54 : LinE4 p is below 2.3V the ADC 54 lr t
outputs I3 and u >
become logic is. I' <
The recommended i E
input signal level is . I c',
300mVrms.
8 I Lins1 8
10 : RinS1 IO
. . 14
14 . LinS2 These pins accept an 16
16 2 RinS2 . . . 20 1009
audio signal as input. 22
20 : LinS3 .
22 I R; S3 Audio Input The recommended 1
. in input signal level is /
1 : LinE2 300mV 49
3 : RinE2 rms.
51 : LinE3
49 : RinE3
2000-03-03 6/46
TOSHIBA
TA8851BN/CN
PIN No.
PIN NAME
FUNCTION
INTERFACE CIRCUIT
25 : Mute
If the voltage on this
pin is above 1.5V, all
audio outputs (main,
sub, and TV) are
disabled.
46 : Vout1
36 : Vout2
Monitor Output
These pins output the
selected composite
signal.
The standard output
signal amplitude is
2.ovp_p.
These pins can sink a
maximum current of
3.0mA.
2000 l
CLAMP1
CLAMP2
Clamp Filter
These pins are a filter
terminal for the clamp
circuit to maintain the
monitor output at a
constant DC level.
If these pins are tied
to GND, the clamp
circuit is disabled, so
that the DC voltage of
the monitor output
cannot be clamped to
a constant level.
37 2099
47 I S‘KQ
48 : Yin1
40 : Cin1
38 : Yin2
30 : Cin2
Comb Y/C Input
These pins accept a
Y/C separated signal
from the comb filter
as input.
The recommended
input signal level is
2.0Vp-p for Y signal
and 600mVp-p for C
signal (burst).
2000-03-03 7/46
TOSHIBA
TA8851BN/CN
PIN No. PIN NAME FUNCTION INTERFACE CIRCUIT
These pins output the
Y and C signals that
are fed to the V/C/D
circuits.
44 : Yout1 The standard output
42 : cout1 signal level is 2.0V -
Y p p 44
34 : Youtz /C Output for Y signal and 42
32 : Cout2 600mVp-p for c signal ,
(burst).
These pins can sink a
maximum current of
2.5mA.
These pins are for -
input and output to ar
and from the 1bit 230 A >
28 : l/OI DAC/ADC of the bus 29 Z
29 . l/O2 l/O signal g;
. . ADC
These pins can source ar H DAC
a maximum current of
2.0mA.
This pin is for output
of the 1bit DAC of the 1?
. bus signal.
31 . O3 O3 This pin can source a (i)
maximum current of 1: "
2.0mA.
26 : SDA These pins are for 26 1009 iii
27 : SCL SCL/SDA input of the Pc bus. 27 JA
35 : Lout2 These pins output an E
39 : RoutD/ . .
R TV audio signal. 33
41 . Cell)' Audio Output These pins can sink a :3 . g
. out maximum current of 41 E
LoutTV 1 4mA 43 cf of
43 : Rout1 . . 45 :3 s
2000-03-03 8/46
TOSHIBA
TA8851BN/CN
ADDRESS MAP
(Slave address 90H, 91H)
MODE DATA No. DATA
Data 1 D07 Doe Dos I Dog Dos D02 I D01 I Doo
DAC Output Sound Mute
TA8851BN
(0) (1) (1) (1) (1) (1)
- Dual Sound Mute
TA8851CN Sound
Write Output
(1) (1) (1)
D17 D16 D15 D14 D13 D12 D11 D10
tenil I I FA/IDEO I
Data 3 D27 I D26 I Dy . I D24 D23 D22 121. . D20
(sub) Y/C Output Switching FA/IDEO Output Switching
(0) (0) (0) (0) (0) (0) (0) (0)
D37 I D36 I D35 I D34 D33 D32 D31 D30
Read Data 4 ADC Ident S Input Ident P.O.R
(0) (0) (0) (0) (0) (0) (0) (1)
FA/IDEO .' Forced video mode
P.0.R : Power On reset (power : ON (1))
(O)(1) .' preset
2000-03-03 9/46
TOSHIBA TA8851BN/CN
(iF) Write mode
Output switching (main)
MODE BUS DATA s INPUT OUTPUT SIGNAL
D13 D12 D11 D10 ISI IS2 153 vout1 Rout1 Lout1
E2 - 1 1 o - - - VinE2 RinE2 LinE2
E3 - 1 o 1 - - - VinE3 RinE3 LinE3
E4 - 1 o o - - - VinE4 RinE4 LinE4
v o o VinS1
y,. SI
1 o 1 1 - - - m . .
SI s + RinS1 LinSI
- 1 cin51
TV v o o vinsz
S2 s 1 0 1 0 - - - Yi'fz RinS2 LinS2
- 1 cinsz
v o o VinS3
S3 s 1 0 0 1 - - - “1153 RinS3 LinSS
- 1 CinS3
Mute - 0 0 0 - - - Mute Mute Mute
Output switching (sub)
MODE BUS DATA s INPUT OUTPUT SIGNAL
D23 Dit2 D21 D20 ISI IS2 153 Vout2 Rout2 Lout2
E2 - 1 1 o - - - VinE2 RinE2 LinE2
E3 - 1 o 1 - - - VinE3 RinE3 LinE3
E4 - 1 o o - - - VinE4 RinE4 LinE4
v o 0 VinS1
1 o 1 1 - - - Yin51 . .
SI s + RinS1 LinS1
- 1 CinS1
TV v o o vinsz
S2 s 1 0 1 0 - - - Yi',"" RinS2 LinS2
- 1 cinsz
v o 0 VinS3
S3 S 1 0 0 1 - - - ir,"." Rmsa Lin53
- 1 CinS3
Mute - 0 O O - - - Mute Mute Mute
Output switching (Dual sound output) .' This table is only applied for TA8851CN.
BUS DATA OUTPUT SIGNAL
Main 1 1
Sub 0 2
2000-03-03 10/46
TOSHIBA TA8851BN/CN
Y/C output switching (main)
MODE BUS DATA OUTPUT SIGNAL
D17 D16 D15 D14 Yout1 Cout1
S-terminal Input 1 1 YinS1 to YinS3 (*1)
Y Video Input EXCEPT 1 0 Vout1 -
Comb1 o o o 1 Yin1
Come 0 o VinE3
S-terminal Input 1 1 CinS1 to CinS3 (*2)
C Video Input 1 0 - - - Vout1
Comb 0 1 Cin1
Mute 0 0 - - Mute Mute
(*1): SY1 switches between YinS1--YinS3
(*2): SCI switches between CinS1--CinS3
Y/C output switching (sub)
MODE BUS DATA OUTPUT SIGNAL
D27 D26 D25 D24 YoutZ Cout2
S-terminal Input 1 1 YinS1 to YinS3 (*1)
Y Video Input EXCEPT 1 0 Vout2 -
Comb1 0 0 0 1 Yin2
Come 0 o VinE4
S-terminal Input 1 1 CinS1 to CinS3 (*2)
C Video Input 1 0 - - - Vout2
Comb 0 1 Cin2
Mute O 0 - - Mute Mute
(*1): SY2 switches between YinS1~YinS3
(*2): SC2 switches between CinS1--CinS3
TOSHIBA TA8851BN/CN
Mute mode
BUS VIDEO OUTPUT SOUND OUTPUT
MODE PIN 25 MAIN SUB MAIN SUB Dual
Yout1 Yout2 Rout1 Rout2 RoutD
BIT DATA Vout1 Coutl Vout2 Cout2 Lout1 l-out2 l-outD
Ext Mute - - High - - - - Mute Mute Mute
Main D 1 - - - - - M te - -
Sound Ill' Doc 1 U Mute
Mute sw 01 - - - - - - -
TV (*) D02 1 - - - - - - - Mute
*3 Main D11 0 - Mute - - - Mute - -
E D12 0
o D20 0
..u ideo & Sub D21 o - - - Mute - - Mute -
3 Sound D 0
rn Mute sw Y/C ce 0
Main D15 0 - - Mute - - - - -
Y/C D24 0
Sub D25 o - - - - Mute - - -
(*) : TV mode is only applied for TA8851BN
DAC output Dual Sound Selection
BUS BUS OUTPUT
TERMINAL BIT DATA OUTPUT MODE BIT DATA RoutD LoutD
1 Open Main Main
l/OI D03 0 Low level MAIN D02 Sound Sound
1 Open 0 Sub Sub
I/O2 D04 0 Low level SUB Sound Sound
O3 D 1 Open
05 0 Low level
© Read mode
S-Output ident ADC ident
BUS BUS
TERMINAL INPUT BIT DATA TERMINAL INPUT BIT DATA
V; S1 L D 1 I/O1 L D 1
V; S2 L D 1 l/O2 L D 1
V; S3 L D 1 I3 L D 1
I4 L D 1
H 37 o
2000-03-03 12/46
TOSHIBA TA8851BN/CN
MODE EXPLANATION
C) “"0 3m
®_+ Ocout ©
VinEBC Y t Ci)
