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TA8667
HORIZONTAL AFC IC
TOSHIBA TA8667P/F
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC
TA8667P, TA8667F
HORIZONTAL AFC IC
The TA8667P, TA8667F is generation of high-frequency TA8667F
clock synchronized with horizontal sync signal. -
(The TA8667P/F is H AFC IC for TC9086F(3DYCS), _----------")"], -
TC9097F (WAC).) l-c-cc-ri-Cid-CP" 't
émflgiflflj ')iii"il
''"ti-"i''i,j"il"1o ii“
FEATURES ii i, i
0 Generate of Typ. 28MHz (1820fH) clock.
DlP18-P-300-2.54D
0 Generate of vertical sync signal. TA8667F
0 Generate of composite sync signal.
SSOP24-P-300-1.00B
Weight
DIP18-P-300-2.54D : 1.47g (Typ.)
BLOCK DIAGRAM SSOP24-P-300-1.00B : 0.32g (Typ.)
TA8667F cs. OUT V. Sepa OUT v. IN W
a 4 (2 G)
- D VCCI
_f'\ Wave
V.SeDalhltl,- V.Snc + '
p C y 7 Shaping -D VCC2
- Wave
H.V. Sepa IN (2 H.V. Sync Phase Comp. VCO Cont. - VCO - Shaping -Cs) 2¢5N OUT
- --------- -12 GND1
v. Mask - -l D
-Ds GND2
V. Mask IN H. ref IN P.D. OUT Bias filter VCO TANK
961001EBA2
O TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can
malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibilit of the buyer, when utilizing
TOSHIBA products, to observe standards of safety, and to avoid situations in which a malfunction or failure of a TO HIBA product could cause loss
of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in tho
TOSHIBA Semiconductor Reliability Handbook.
0 The products described in this document are subject to foreign exchange and foreign trade control laws.
0 The information contained herein is presented only as a guide for the ap Iications of our products. No responsibility is assumed by TOSHIBA
CORPORATION for any infringements of intellectual property or other rights o the third parties which may result from its use. No license is granted
b implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others.
o T e information contained herein is subject to change without notice.
1997-11-05 1/13
TOSHIBA TA8667P/F
TERMINAL CONNECTION DIAGRAM
v. Sepa IN C V D GND2 v. Sepa IN C V D GND2
HN. Sepa IN C D VCO TANK H.V. Sepa IN C D VCO TANK
c.s. OUT Ci) 0. Ci) Ct ii)
v. Sepa OUT Ci) C; D vcc2 C u- D
v. IN G: LO D Vcc1 cs. OUT Cs? Ps Ci)) vcc2
V. OUT (E 00 D 2¢SN OUT v. Sepa OUT (ii) u, D Vcc1
H. ref IN Ci; < D GND1 v. IN C e, Ci))) 2¢5N OUT
V. Mask IN Ci) D filter V. OUT GD < E GND1
P.D. OUT 9 Ci)) Bias Ci) F- D
H. ref IN (iii Ci)
v. Mask IN @ D filter
P.D. OUT C D Bias
TERMINAL FUNCTION
TA8667P TA8667P TYP. DC
PIN No. PIN No. PIN NAME VOLTAGE I/O CIRCUIT FUNCTION
x ' e V. Sepa IN : Inputs vertical
sync signal separated from
1 1 V. Sepa IN video signal.
(6.0V) 0 H.V. Sepa IN : Inputs
2 2 H.V. Sepa IN 1: horizontal and vertical sync
signals separated from
C) 7: video signal.
A! GND1
7r 0 Outputs horizontal and
3 5 CS. OUT - vertical sync signals after
C) x E E 6' wave shaping.
m S
x it 0 Outputs vertical sync
4 6 V. Sepa OUT - ngnal. Hori.zont.al sync
o-, signal remains m V. Sepa
Ir OUT.
A! GND1
1997-11-05 2/13
TOSHIBA TA8667P/F
TA8667P TA8667F TYP. DC
PIN No. PIN No. PIN NAME VOLTAGE I/O CIRCUIT FUNCTION
C) Vccl
x ir; It Inputs the signal outputted
5 7 V IN - from V. Sepa OUT after
. o-, soon horizontal sync signal was
a: removed.
I17 GND1
7: , o Outputs wave-shaped
6 8 v. OUT - Cy-, vertical sync signal.
1: g 2 il
07 tN st GND1
a Phase Comp Input. The
E Vccl reference input is the
x E 15.7kH2 signal derived
through dividing the 2¢SN
7 10 H. ref IN - CD- a OUT signal by N
I if, (1820--2426) with an
F GND1 external frequency divider
(duty : 50%).
- Vcc1 q Driving the V. Mask IN
:3; signal to high turns off the
(L I 0V) r ". phase-comparison
8 11 V. Mask IN operation. Inputs the signal
(H : 5V) g c; which masks serrated and
its GND1 equalizing pulses of video
, signal.
9 12 P.D. OUT -
It Connect an external filter.
1O 13 Bias 6V 20m
I77 GND1
1997-11-05 3/13
TOSHIBA TA8667P/F
TA8667P TA8667F TYP. DC
PIN No. PIN No. PIN NAME VOLTAGE I/O CIRCUIT FUNCTION
11 14 filter 6V It Connects an external filter.
'" GND1
12 17 GND1
18 24 GND2 o Power-supply voltage and
14 19 Vcc1 GND.
15 20 Vcc2
qr o Outputs the stable sin
13 18 2¢SN OUT - o- wave of N times the fH
Tr 2 frequency.
'" GND2
qr 7r =,t
16 22 5.2V 0 I o te the osgillatciihg . h
VCO TANC C) 'ae/S/Te 'tye,ej1s,tai,ni1,tde
17 23 5.2V lr 7r V y X V I
I77 I” GND2
1997-11-05 4/13
TOSHIBA
TA8667P/F
MAXIMUM RATINGS (Ta=25°C)
CHARACTERISTIC SYMBOL RATINGS UNIT
Power Supply Voltage VCC max 12 V
Input Signal Voltage ein max 6 Vp-p
Power TA8667P P 1320 mW
Consumption TA8667F D 830
Operating Temperature Topr - 20--70 "C
Storage Temperature Tstg - 55--150 ''C
TA8667P TA8667F
A 1500 A 1500
E 1320 E
a 1000 a 1000
E 845 S
g 500 if,
2 2 . .
25 70 150 25 70 150
OPERATING TEMPERATURE (°C) OPERATING TEMPERATURE CC)
RECOMMENDED OPERATING CONDITION
2) PIN NAME MIN. TYP. MAX. UNIT
Ll V 1
CC 8.5 9.0 9.5 v
15 Vch
1997-11-05 5/13
TOSHIBA TA8667P/F
ELECTRICAL CHARACTERISTICS (VCC =9.0V, Ta = 25°C)
All the pin numbers in the below description are those of the TA8667P.
TEST TEST CONDITION
CHARACTERISTIC SYMBOL PIN (SEE"TEST CIRCUIT") MIN. TYP. MAX. UNIT
Operating Power Supply
V .1 . . V
Voltage CC 8 9 0 9 9
Operating Power Supply
Current ICC 15 27 40 mA
1) Measure Voltages V3 and V6
of Pin 3 and Pin 6, respectively.
2) Connect variable voltage
VOH (1) 3 " source to Pin 2 and Pin 5. 2.5 4.0 5.5
3) Change variable voltage
source and measure voltages
High Level V3 and V6 when high.
1) Measure Voltage V4 of Pin 4.
2) Connect variable voltage
source to Pin 1.
VOH (2) 4 3) Change variable voltage 7.0 - 8.3
source and measure voltage
Output V4 when high.
Voltage 1) Measure Voltages V3 and V6
of Pin 3 and Pin 6, respectively.
2) Connect variable voltage
V0L(1) 3 ,6 source to Pin 2 and Pin 5. - 0.3 0.5
3) Change variable voltage
source and measure voltages
Low Level V3 and V6 when low.
1) Measure Voltage V4 of Pin 4.
2) Connect variable voltage
source to Pin 1.
VOLQ) 4 3) Change variable voltage - 0.3 0.5
source and measure voltage
V4 when low.
Input High Level VIH 2.5 4.0 -
Connect an ammeter to Pin 7
Voltage Low Level VIL 7 ' 8 - 0.3 0.8
Input and Pin 8. VIH = 4.0V.
High Level
Current Connect an ammeter to Pin 7
Low Level "L 7,8 and Pin 8. VIL=0.3V. - 0 - pA
1997-11-05 6/13
TOSHIBA TA8667P/F
TEST TEST CONDITION
CHARACTERISTIC SYMBOL PIN (SEE "TEST CIRCUIT") MIN. TYP. MAX. UNIT
1) Measure Voltage V4 (V3) of
Pin 4 (Pin 3).
2) Connect variable voltage
source to Pin1 (Pin 2) through
s nc Se arator In ut an ammeter.
Sinsitiviecy Curren’:3 IINS 1,2 3) Change variable voltage - 23 - PA
source and measure the
current outflowed from Pin 1
(Pin 2) on the high to low
transition of V4 (V3).
1) SW1 .' Off, SW2 : On 28.6
2) Measure the level of TP1 with - (Note -
counter.
. . MHz
Oscillating Frequency fo 13 3) Adjust the value of the 32.0
variable coil until it reaches - (Note -
15.73kHzxN. 2)
M h I I f TP1 h
Output Level Vo 13 Ieasure t e eve 0 at t e 2.0 3.2 4.0 Vp-p
time when to IS measured.
1) Switch on SW1 in the same
condition that f0 is measured.
. 2) Input the sync signal of
- - ns
Output Jitter TG 13 15.73kHz to Pin 2. 14
3) Measure the output waveform
of the frequency divider.
(Note 1) VCO TANC : TRF3518D used
(Note 2) VCO TANC : TRF3503K used
1997-11-05 7/13
TOSHIBA
TA8667P/F
CHARACTERISTIC
SYMBOL
TEST CONDITION
(SEE "TEST CIRCUIT")
TYP. MAX. U NIT
Horizontal Frequency
Phase Comparison
Range2
Horizontal Frequency
Hold Range
1) SW1 : Off, SW2 : On.
Pin 2 : Open.
2) Measure the frequency of
3) Adjust the value of the
variable coil until it reaches
15.73kHZxN (fo=32.2MHz).
4) SW1 : On
5) Connect S.G* to Pin 2.
6) Measure the power supply of
7) Raise the S.G* frequency
starting from around 13.6kHz
and measure the frequency
when PLL is locked.
8) Raise the S.G* frequency
further and measure it when
PLL is unlocked.
9) Lower the frequency and
measure it when PLL is locked
again.
10)Lower the frequency further
and measure it when PLL is
unlocked again (See Figure 1).
C.S. OUT Delay Time
(See Figure 2)
63.5 s . SE
F-0'Ms-oi tcsd -Tr-
H. ref IN - Cs_t.rr
Steady-State Phase
Difference
(See Figure 3)
1) Switch on SW1 in the same
condition that f0 is measured.
2) Adjust the value of the
variable coil until it reaches
15.73kHzxN (fo=32.2MHz).
3) Input the sync signal of
15.73kHz to Pin 2.
4) Measure the signal waveforms
of Pin 3 and Pin7
simultaneously.
* : S.G=Sync Generator
1997-11-05 8/13
TOSHIBA TA8667P/F
Figure 1
15.7.3kHz
Figure 2
CS. OUT Delay Time : tcsd
Video IN
cs. OUT I I
Figure 3
H. ref IN - c.s. OUT Steady-State Phase Difference : tafce
I T/2 T/2
cs. OUT I I I a k T
H. ref IN I I I I
_.I u- - u-
tafce tafce
1997-11-05 9/13
TOSHIBA TA8667P/F
TEST CIRCUIT (Pin assignment for TA8667P)
C LI. LL
sw1 iii JI ' Iii
o\c OTP1 m' + S
LL I C?,
l, :L g?
o o 2SC1815 ._0
Varia_b|_e_coi| Fe + Tc; . TP2 2csv
I I SW2
b-----' '-o
i 17 16 15 14 13 (1; JD Ji
. TA8667P
<1) i) j) T j) (i) 7 j) 9
Variable coil (VCO TANK) : Select an inductance suited for the oscillating frequency.
PRECAUTIONS
V. Mask IN (See Figure 4, "An example of V. Mask IN timing")
Driving the V. Mask IN signal to high stops phase-comparison operation.
Adjust the signal so that equalizing pulse of video signal and vertical sync signal are masked.
Masking some parts of horizontal sync signal and video signal do not cause a problem.
However, the rise and fall of V. Mask IN must not occur while horizontal sync signal and
equalizing pulse are low - the time indicated with " l " in Figure 4, for example.
Figure 4 "An example of V. Mask IN timing"
LEqualizing pulses, Vertical sync signal Equalizing pulse
VideolN [ji-rp,:;-)))-,,),..,,,).,):-) 111- -
cEqualizing pulse I Vertical sync signal Equalizing pulse
Man 11 i i
Masking time
ll ----- VlH
V. Mask IN
1997-11-05 10/13
TOSHIBA TA8667P/F
C) Example of VCO TANK Specification for 32MHz clock (TRF3503K)
When f=7.96MHz :
L=2.35pH (Varied within more than i15%)
Q = 47
C) Example of VCO TANK Specification for 28MHz clock (TRF3518D)
When f=7.96MHz :
L=3.5PH (Varied within more than i15%)
SAMPLE APPLICATION 1 (Pin Assignment for TA8667P)
An example of 28.6MHz clock generation.
5.1m 0.47pF
TRF3518D used. + -
0.056/1F
cs. OUT v. OUT
a v. Sepa OUTQD 5 v. IN 6
V. Sepa IN -D Vcc1
Video In 3300 0474”
2V - + 1 - v. Sync Ch, 5mm;
( P.p) t 2 Cl T
‘2; M E . -C1i) Vcc2
HAI. Sepa IN
1600 2000 + - Wave
2 - H.V. Sync Phase Comp. VCO Cont. - VCO
L5. 2.2,uF ce shaping 28.6MHz
o x f A
g; g " ----_-- J
l D GND1
V. Mask ------ "
D GND2
P D. ou filter
v. Mask IN (i) H ref IN (P Q
15.7kHz
———--|
8 VCO TANK
._l (TRF3518D)
28.6MHz
The above illustration shows an example for application and may require modification in
constant and circuit for practical design.
TOSHIBA TA8667P/F
OUTLINE DRAWING
DlP18-P-300-2.54D Unit : mm
0—1 5°
_ 4.15:0..3
2.14TYP
Weight : 1.47g (Typ.)
1997-11-05 12/13
TOSHIBA TA8667P/F
OUTLINE DRAWING
SSOP24-P-300-1.00B Unit : mm
24 13 -
FlFlRFlfilFlFlgFlfiF] " F
N c; I-C-i"
tli:'-,', iii'. cioi,
E 13.5MAX p.,'
b," 13.0i02 =
fihmllflflflfliflflflfi—aev
?_o_15 E?
Weight : 0.32g (Typ.)
'i/ii-tie/get---------'.-.,
1 .OTYP l 0.4i0.1 iEIEEEi2
0.15 ,095
1997-11-05 13/13
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