TA1248F ,I/Q DEMODULATION IC FOR DIGITAL STELLITE RECEIVERFEATURESSupply voltage : 5V
C, amp
uu-Illlcal algllal level amp
Sync, quasi-sync detect PLL
..
TA1249F ,2-CHANNEL RECORDING AMPLIFIER & PRE-AMPLIFIER FOR VCRTA1249FTA17AQFThe TA1249F is a 2-channel recording amplifier and pre-
amplifier for use in VCR. Si ..
TA1250F ,4-CHANNEL RECORDING AMPLIFIER & PRE-AMPLIFIER FOR VCRTA1250FThe TA1250F is a 4-channel recording amplifier and pre-
amplifier for use in VCR. Since the ..
TA1252AN ,NTSC VIDEO, CHROMA, DEFLECTION, AND DISTORSION COMPENSATION IC
TA1267AF ,MULTISTANDARD PIF / SIF SYNCHRONOUS DEMODULATOR ICFEATURES PIF CIRCUIT True synchronous PIF demodulator 3-stages gain controlled PIF amplifier ..
TA1268N ,I2C BUS CONTROL NTSC 1CHIP COLOR TV ICTA1268NTA17ERNVVI‘IZC BUS CONTROL NTSC 1CHIP COLOR TV ICTA1268N provides PIF, SIF, Video, Chroma an ..
TC4030BF ,QUAD EXCLUSIVE-OR GATETC403OBP/B F/BFN(Note) The JEDEC SOP (FN) is not available inTC40303 QUAD EXCLUSIVE-OR GATE Japan.T ..
TC4030BFN ,QUAD EXCLUSIVE-OR GATEELECTRICAL CHARACTERISTICS NSS-- OV)CHARACTERISTIC SYM- TEST CONDITION VDD
BOL (V)
5
10
15
..
TC4030BFN ,QUAD EXCLUSIVE-OR GATETC403OBP/B F/BFN(Note) The JEDEC SOP (FN) is not available inTC40303 QUAD EXCLUSIVE-OR GATE Japan.T ..
TC4030BP ,QUAD EXCLUSIVE-OR GATETC403OBP/B F/BFN(Note) The JEDEC SOP (FN) is not available inTC40303 QUAD EXCLUSIVE-OR GATE Japan.T ..
TC4040BF ,12 STAGE RIPPLE-CARRY BINARY COUNTER/DIVIDERSTC404OB P/B F/B FNIv-I '(Note) The JEDEC SOP (FN) is not available inCOUNTER / DIVIDERS Japan.TC404 ..
TC4040BF N ,12 STAGE RIPPLE-CARRY BINARY COUNTER/DIVIDERSTC404OB P/B F/B FNIv-I '(Note) The JEDEC SOP (FN) is not available inCOUNTER / DIVIDERS Japan.TC404 ..
TA1248F
I/Q DEMODULATION IC FOR DIGITAL STELLITE RECEIVER
TOSHIBA TA1248F
TENTATIVE TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC
TAI 248F
IIQ DEMODULATION IC FOR DIGITAL SATELLITE RECEIVER
FEATURES
0 Supply voltage : 5V
0 Second IF AGC amp
It dB-linear signal level amp
0 Sync, quasi-sync detect PLL
It 90° phase shifter
o Baseband output amp
It HQFP30-P-1010 ideal for surface mounting
HQFP30-P-1010-1.00
Weight : 0.61g (Typ.)
(Note) : These devices are easy to be damaged by high static voltage or electric fields.
In regards to this, please handle with care.
000707EBA1
OTOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in
making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA
products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set
forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set
forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics applications (computer,
personal equi ment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These
TOSHIBA pro ucts are neither intended nor warranted for usage in equipment that requires extraordinarily high
quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury
("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments,
transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of
t2,ty,i,1e.vices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's
own ris .
OThe products described in this document are subject to the foreign exchange and foreign trade laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
2001-02-22 1/16
TOSHIBA TA1248F
BLOCK DIAGRAM
a U 8 H
a U a 3 -
w > - k? a C) g
3 cy CT
U U? U o C) up ' +4
E E a - : dr a G 3
(ii) (G) (Q GD (ii) (ii) ® fr) (ii)
XO-TNK1 f2,.iIrts) i i, DAtsc-vco
XO-TNK2 Ci 8. i; jC4)Atsc-tsNDA
CD-SW2 (i? -1/M -Cii)vc-in2
(ily- 1/N
CD-SW1 a -D IF-in1
PLL-Fil1 (ii-; N D AGC-VCCA
PLL-Fil2 Ci) A 10 1st. Fil
CD-SW3€
90 Adj (:3
l/Q-GNDA (“3
VCO-TNKZ @
l/Q-VCC GB
AGC-GNDB G
AGC—CNT (.3
1st Ad] (u;
(Note 1) M : XO divider ratio (1 /1, 1/2)
(Note 2) N : VCO divider ratio (1 /32, 1/64, 1/128, 1/256)
2001-02-22 2/16
TOSHIBA
TA1248F
TERMINAL FUNCTIONS
Elly PIN NAME FUNCTION INTERFACE CIRCUIT
Switches XO divider ratio.
. . . . SW-3 DIVIDER
1 X0 divider ratio switch RATIO (Note) 0 . GND
0 1/1 1 : Vcc or g it;
1 1/2 open J
90° phase shifter adjust
Fine-adjusts phase difference
voltage.
2 pin between I and Q outputs.
IC internal bias is Til/cc. (fy
'tl cc N
3 HQ GND-A I/Q block GND pinA -
VCO which uses internal impedance 1: d
of diode corresponding to control " V
4 voltage from PLL block. N
5 VCO tank To compensate for internal
temperature drift, use a capacitor
with UJ characteristic for external
tank circuit.
6 HQ VCC I/Q block power supply pin
7 AGC GND-B AGC block GND pin B
8 AGC control pin Gain changes according to applied
2001-02-22 3/16
TOSHIBA
TA1248F
adjust pin
No PIN NAME FUNCTIONS INTERFACE CIRCUIT
Because control signal is generated
9 First AGC delay point to previous stage second converter
block of AGC circuit at excess input
to IC, sets input level threshold.
First AGC filter
Outputs the result of comparing AGC
voltage with first AGC delay point
voltage. The comparator is
configured with an active load type
high gain amp. The active low pass
filter is constructed by the
capacitance connected to this pin.
11 AGC Vcc-A AGC block power supply pin A
12 IF input pins. For unbalanced input,
13 IF input pins ground one of these pins via a o; T(1))
capacitor. 3:» f;
-_g j i
14 AGC GND-A AGC block GND pinA -
15 AGC l/cc-l? AGC block power supply pin B -
16 First AGC output pin Outputs control voltage Via an
emitter follower.
2001-02-22 4/16
TOSHIBA
TA1248F
No PIN NAME FUNCTIONS INTERFACE CIRCUIT
17 Signal level output pin 'c:l,unt,','eu,tsi'oec voltage after '
18 N. C Leave this pin open. -
19 Q signal output Q signal output pin
a Cig"
20 HQ GND-B l/Q block GND pin B
21 I signal output I signal output pin
22 N. C. Leave this pin open.
23 90° phase shifter VCC Power supply of 90 phase shifter
90° phase shifter GND
GND pin of 90° phase shifter block
Crystal oscillator
Crystal oscillator used as reference
for PLL operation. For external input,
input from pin 26.
2001-02-22 5/16
TOSHIBA TA1248F
KIT PIN NAME FUNCTIONS INTERFACE CIRCUIT
VCO divider switch pin
27 VCO divider ratio switch 2 DIVIDER
SW-l SW-2 RATIO
0 0 1/32 (Note) C) s,
o 1 1/64 0 : GND l i a
28 VCO divider ratio switch 1 1 0 1/128 1 I Vcc or g;
1 1 1/256 open
Low-pass filter for PLL block
30 oop Iter connecting pin 25kQ
MAXIMUM RATINGS (Ta=25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Power Supply Voltage VCC MAX 6.0 V
Power Dissipation PD MAX 1080 mW
Operating Temperature Topr -20--75 "C
Storage Temperature Tstg - 55-150 "C
(Note) When using the device at above Ta =25°C, decrease the power dissipation by 8.7mW
for each increase of 1°C.
RECOMMENDED OPERATING CONDITION
t')lu. PIN NAME MIN. TYP. MAX. UNIT
6 HQ vcc 4.5 5.0 5.5 v
11 AGC VCCA 4.5 5.0 5.5 v
15 AGC VCCB 4.5 5.0 5.5 v
23 DIG. Vcc 4.5 5.0 5.5 v
2001-02-22 6/16
TOSHIBA TA1248F
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS (Unless otherwise specified, Vcc=5.0V, Ta =25°C)
CHARACTERISTIC SYMBOL Aff TEST CONDITION MIN. TYP. MAX. UNIT
E:\xzr‘tswply And ICC 1 - 85 108 145 mA
Pin 2 V2 - 2.3 2.5 2.7
Pin 4 V4 (Note) 4.6 4.75 4.9
Pin 5 V5 (Note) 4.6 4.75 4.9
Pin 8 V8 - 2.3 2.5 2.7
Pin 9 V9 - 2.3 2.5 2.7
Pin 10 V10 - 4.4 4.65 4.9
Pin 12 v12 - 1.5 1.8 2.1
Terminal Pin 13 V13 1 - 1.5 1.8 2.1 V
Voltage Pin 16 V16 - 3.8 4 4.2
Pin 17 v17 - 1.3 1.65 2.0
Pin 19 V19 - 1.2 1.7 2.2
Pin 21 v21 - 1.2 1.7 2.2
Pin 25 v25 - 2.4 2.7 3
Pin 26 v26 - 1.9 2.1 2.3
Pin 29 V29 - 2.0 2.3 2.6
Pin 30 v30 - 2.0 2.3 2.6
(Note) When testing pins4 and 5, connect pins4 and 5, and pins 29 and 30.
2001-02-22 7/16
TOSHIBA TA1248F
AC CHARACTERISTICS (Unless otherwise specified, Vcc=5.0V, Ta =25°C)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
IF Input Frequency Range fin 2 - 350 - 650 MHz
f Input Level Range Vin - For IF balanced input -56 - -21 dBmW
Gain Control Voltage (Max.) Vcmax 2 (Note I) 1.8 - - V
Gain Control Voltage (Min.) chin 2 (Note 2) - - 3.3 V
Gain Control Sensitivity s gain 2 (Note 3) - - 65 dB/V
First AGC Delay Point 1st 25 2 (Note 4) - 2.8 - V
Flr'st AGC Maximum Delay 1st max 2 (Note 5) - 3.2 - V
Flr-st AGC Minimum Delay 1st min 2 (Note 6) - 1.9 - V
First AGC Delay Point
1 A 2 N 7 - - 1 V
Stability st ( ote ) 00 m
First AGC Control Sensitivity S 1st 2 (Note 8) - - 200 V/V
First AGC Maximum Output
Voltage Ist Vmax 2 (Note 9) 3.5 4 - V
First AGC Minimum Output .
Voltage 1st me 2 (Note 10) - 0.2 0.5 V
Signal Level Sensitivity S sig 2 (Note 11) - 1.67 - V/V
Signal Level Maximum .
V 2 N 12 . - - V
Output Voltage Sig max ( ote ) 3.5
Signal Level Minimum . .
Output Voltage SigV mm 2 (Note 13) - - 1 V
Signal Level Output Stability SigV A 2 (Note 14) - - 100 mV
VCO Lock Range fL 2 (Note 15) $1.5 - - MHz
VCO Capture Range fc 2 (Note 16) $3.5 - - MHz
Side band Rejection Level fS/l 2 (Note 17) - - -40 dBc
Phase Noise (Af=100Hz) PN100 - - -60 dBc/Hz
(Af=1kHz) PN1k - - - 70 dBc/ Hz
(Af=10kHz) PN10k 2 (Note 18) - - -80 dBc/Hz
(nf=100KHz) PN100k - - -90 dBc/ Hz
(Af=1MH2) PN1M - - -100 dBc/Hz
l/Q Gain Balance B gain 2 (Note 19) - - 11 dB
I/Q Phase Balance B deg 2 (Note 20) - - :2 o
Output Response fresp. 2 (Note 21) - - :1 dB
Output Lo Leakage L Lo 2 (Note 22) - - -50 dBc
Tgrtnary Mutual Modulation IM3 2 (Note 23) - - -30 dBc
Distortion
2001-02-22 8/16
TOSHIBA TA1248F
TEST CONDITIONS
(Note 1)
(Note 2)
(Note 3)
(Note 4)
(Note 5)
(Note 6)
Gain control voltage (Max.)
(1) Input f=404.78MHz, -50dBmW CW in pin 12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the output amplitude becomes 1up-p.
(4) Measure the DC voltage at (3) above.
Gain control voltage (Min.)
(1) Input f=404.78MHz, -20dBmW CW in pin12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the output amplitude becomes ll/p-p.
(4) Measure the DC voltage at (3) above.
Gain control sensitivity
(1) Input f=404.78MHz, -20dBmW CW in pin12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the output amplitude becomes ll/p-p.
(4) Measure the DC voltage at (3) above.
(5) Input f=404.78MHz, -30dBmW CW in pin12.
(6) Monitor pin 19 using an oscilloscope.
(7) Supply DC voltage to pin 8 so that the output amplitude becomes 1up-p.
(8) Measure the DC voltage at (3) above.
(9) Calculate the sensitivity. 10/[Measured value at (4) above-measured value at (8)
above]
First AGC delay point
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply between 1.8 and 3.3V DC to pin 8.
(4) Measure the pin 8 voltage when the pin 16 voltage drops to 3.5V or below.
First AGC maximum delay point
(1) Supply 2.0V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply between 1.8 and 3.3V DC to pin 8.
(4) Measure the pin 8 voltage when the pin 16 voltage drops to 3.5V or below.
First AGC minimum delay point
(1) Supply 3.7V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply between 1.8 and 3.3V DC to pin 8.
(4) Measure the pin 8 voltage when the pin 16 voltage drops to 3.5V or below.
2001-02-22 9/16
TOSHIBA TA1248F
(Note 7)
(Note 8)
(Note 9)
(Note 10)
(Note 11)
First AGC delay point stability
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply 2.5V DC to pin 8.
(4) Measure the pin 16 voltage.
(5) At -25''C or +75°C and Vcc=4.5V or 5.5V, repeat from (1) to (4) above.
(6) Calculate the output stability. [Measured maximum value at (5) above-measured
minimum value at (5) above]
First AGC control sensitivity
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply 1.8 to 3.3V DC to pin 8.
(4) Measure the pin 8 and 16 voltages when the pin 16 voltage drops to 3.5V or below.
(5) Measure the pin 8 and 16 voltages when the pin 16 voltage drops to 1.0V or below.
(6) Calculate the output stability. -lPin 16 at (4) above-pin 16 at (5) above]/[Pin 8 at (4)
above - pin 8 at (5) above]
First AGC maximum output voltage
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply 1.8V DC to pin 8.
(4) Measure the pin 16 voltage.
First AGC minimum output voltage
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 16 using a voltmeter.
(3) Supply 3.3V DC to pin 8.
(4) Measure the pin 16 voltage.
Signal level sensitivity
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 17 using a voltmeter.
(3) Supply 2.2V DC to pin 8.
(4) Measure the pin 17 voltage.
(5) Supply 2.6V DC to pin 8.
(6) Measure the pin 17 voltage.
(7) Calculate the sensitivity. [Measured value at (6) above-measured value at (4) above]/
2001-02-22 10/16
TOSHIBA TA1248F
(Note 12) Signal level maximum output voltage
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 17 using a voltmeter.
(3) Supply 3.3V DC to pin 8.
(4) Measure the pin 17 voltage.
(Note 13) Signal level minimum output voltage
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 17 using a voltmeter.
(3) Supply 1.8V DC to pin 8.
(4) Measure the pin 17 voltage.
(Note 14) Signal level output stability
(1) Supply 2.5V DC to pin 9.
(2) Monitor pin 17 using a voltmeter.
(3) Supply 2.5V DC to pin 8.
(4) Measure the pin 17 voltage.
(5) At -25''C or +75°C and Vcc=4.5V or 5.5V, repeat from (1) to (4) above.
(6) Calculate the output stability. [Measured maximum value at (5) above-measured
minimum value at (5) above]
(Note 15) VCO lock range
(1) All of SW-1, SW-2 and SW-3 connect to GND.
(2) After connecting pins 29 and 30, adjust VCO L so that the desired oscillation frequency,
f, is obtained.
(3) After disconnecting the crystal oscillator between pins 25 and 26, input frequency .'
f/32, amplitude : li/p-p sine wave signal fref to pin 26.
(4) Change the fref frequency in plus and minus directions and observe frequencies
[iAfrck] at the upper and lower limits where PLL lock is off.
(4) VCO lock range : 32x(iAfrck)
(Note 16) VCO capture range
(1) All of SW-1, SW-2 and SW-3 connect to GND.
(2) After connecting pins 29 and 30, adjust VCO L so that the desired oscillation frequency,
f, is obtained.
(3) After disconnecting the crystal oscillator between pins 25 and 26, input frequency :
f/32, amplitude : 1Vp-p sine wave signal fref to pin 26.
(4) Change, in the plus and minus directions, from a frequency sufficiently large compared
with [frefiAfrck] (PLL lock is off) to fref, the frequency of the signal input to pin 26.
Observe frequencies [iAfpul] at the upper and lower limits where PLL is locked.
(5)VCO capture range : 32x(iAfpul)
2001-02-22 11/16
TOSHIBA TA1248F
(Note 17)
(Note 18)
(Note 19)
(Note 20)
Side band rejection level
(1) All of SW-1, SW-2 and SW-3 connect to GND.
(2) Provide, with monitor coil (L), the VCO tank which is connected to pins4 and 5.
(3) After connecting pins 29 and 30, adjust VCO L so that the desired oscillation frequency,
f, is obtained.
(4) Observe oscillation strength PVCO of the VCO spectrum using a spectrum analyzer.
(5) Observe spectrum Psp located at the frequency obtained by integer-multiplying the
PLL compare reference frequency (12.587MH2).
(6) Calculate (PVCO - Psp).
Phase noise
(1) All of SW-1, SW-2 and SW-3 connect to GND.
(2) Provide, with monitor coil (L), the VCO tank which is connected to pins4 and 5.
(3) After connecting pins 29 and 30, adjust VCO L so that the desired oscillation frequency,
f, is obtained.
(4) Observe oscillation strength PVCO of the VCO oscillator spectrum using a spectrum
analyzer.
(5) Observe spectrum Pnoise at a frequency which is At away from the oscillation
frequency.
(6) Calculate (PVCO = Pnoise) /Af).
I/Q gain balance
(1) Input f=417.78MHz, -20dBmW CW to pin 12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the pin 19 output amplitude becomes li/p-p.
(4) Measure the amplitude ratio of pin 21 and pin 19.
(5) Set the input level to -50dBmW and repeat (2) to (4) above.
l/Q phase balance
(1) Input f=417.78MHz, -20dBmW CW to pin12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the pin 19 output amplitude becomes lup-p.
(4) Measure the phase difference of pin 21 and pin19.
(5) Set the input level to -50dBmW and repeat (2) to (4) above.
2001-02-22 12/16
TOSHIBA TA1248F
(Note 21)
(Note 22)
(Note 23)
Output response
(1) Input f=382.78MHz, -20dBmW CW to pin 12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the pin 19 output amplitude becomes li/p-p.
(4)While varying the input frequency from 382.78 to 422.78MHz, observe the output
amplitude of pin 19.
(5) Calculate the gain deviation. 20€og [Measured value at (4) above/1.0]
Output Lo leakage
(1) Input f=382.78MHz, -54dBmW CW to pin12.
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the pin 19 output amplitude becomes 1up-p.
(4) Measure the pin 19 level using a spectrum analyzer.
(5) Measure the Lo signal (402.78MHz) level using the spectrum analyzer.
(6) Calculate the relative value against the pin 19 level. [Measured value at (4) above-
measured value at (5) above]
Tertiary mutual modulation distortion
(1) Input the following two CW signals to pin12.
f1=404.78MHz, -20dBmW
f2=405.28MHz, -20dBmW
(2) Monitor pin 19 using an oscilloscope.
(3) Supply DC voltage to pin 8 so that the pin 19 output amplitude becomes li/p-p.
(4) Measure the pin 19 level using a spectrum analyzer.
(5) Measure the IM3 (spurious) level using the spectrum analyzer.
(6) Calculate the IM3 relative value. [Measured value at (5) above-measured value at (4)
above]
2001-02-22 13/16
TOSHIBA TA1248F
TEST CIRCUIT 1
DC CHARACTERISTICS
Vcc=5V
0.01PF
--P--t
Q) IPF
(iii D-t
C) 2200pF
2001-02-22 14/16
TOSHIBA TA1248F
TEST CIRCUIT 2
AC CHARACTERISTICS
(402.78MHZ IF) vcc=5v
2.2/1F
2200pF 3609 3600
(:5 23 62 21 Gwo) 19 (ii) 17 16
27PF 'rF,' :
it-, 25 15 .
X'talg=
x-, 26 C)-t
"I, 27pF
C-fr-fi?
C) 2200pF E
1 2 4 5 6 8 9
g) 2pF 2200p?
2.2psf
VCC C,
Crystal oscillator specifications
FREQUENCY FREQUENCY LOAD EQUIVALENT SERIES PARALLEL
[MHz] DEVIATION CAPACITANCE RESISTANCE CAPACITANCE TEMPERATURE
[ppm] [pF] [0] [pF]
12,586875 $30 10.0i0.5 below 40 2.61'05 -2r- +80°C
(*) Resonance condition : parallel
TOSHIBA TA1248F
PACKAGE DIMENSIONS
HQFP30-P-1010-1.00 Unit : mm
13.2i0.3
2.4i0.2
PM p,"
li,?:?
l l 0.9i0.2
Weight : 0.61g (Typ.)
2001-02-22 16/16
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