T6A40 ,LCD DriverTOSHIBA T6A40
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
T6A40
ROW DRIVER ..
T6A6CI , Bi-Directional Triode Thyristor 6A Mold TRIAC
T6B07 ,COLUMN DRIVER FOR A DOT MATRIX LCDFeatures Display duty application : to 1/240 LCD drive signal : 80 Data transfer : 1, 2, 4-bi ..
T6B07 ,COLUMN DRIVER FOR A DOT MATRIX LCDT6B07 TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T6B07 COLUMN DRIVER FOR A DOT MA ..
T6B08 ,ROW DRIVER FOR A DOT MATRIX LCDBlock Diagram 1 2001-12-04 T6B08 Pin Assignment 2 2001-12-04 T6B08 Pin Functions Pin Name I / O ..
T6B65A ,COLUMN DRIVER LSI FOR A DOT MATRIX GRAPHIC LCDT6B65A TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T6B65A COLUMN DRIVER LSI FOR A ..
TC0205AD ,N/P-Channel 20-V MOSFETS-04279—Rev. B, 16-Jul-0111-1TC0205ADNew ProductVishay Siliconix ..
TC02VZB , PRECISION TEMPERATURE-TO-VOLTAGE CONVERTERS
TC02VZB , PRECISION TEMPERATURE-TO-VOLTAGE CONVERTERS
TC04A-200 , Battery Tracking TransClamp For SLIC Linecard Protection
TC05ACOA , LOW POWER, BANDGAP VOLTAGE REFERENCES
TC07-11EWA , 18MM (0.7 INCH) SINGLE COLOR DOT MATRIX DISPLAYS
T6A40
LCD Driver
TOSH I BA T6A40
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
ROW DRIVER FOR A DOT MATRIX LCD
The T6A40 is a 68-channel-output row driver for an STN
dot matrix LCD. The T6A40 features -28-V LCD drive
voltage. The T6A40 is able to drive LCD panels with a
duty ratio of up to 1/240. It is recommended for use
with the T6A39.
FEATURES
0 Display duty application : to 1/240
0 LCD drive signal : 68
q Data transfer : 1-bit bidirectional
C) O68E--OI
© O68-sOl
<3) OI-OOM, O35e-O68
q LCD drive voltage : -8 to -28V (max -30V) QFP92-P-1818-0.70B
q Operating voltage : 4.5 to 5.5V Weight : 1.45g (typ.)
0 Operating temperature .' -20 to 75°C
q LCD drive output resistance : 1.5k0 (max) (12.8V, 1/9 bias)
0 LCD drive output timing : Change on falling edge of LP
BLOCK DIAGRAM
068 to Ol
I 68-bit 4-Level Buffer i \
r 68-bit Level Shifter I
68 Bit Latch "j--------
, 34 ( 34
34-bit 34-bit
Bidirectional Bidirectional
Shift Register Shift Register
. Data SCP_ FR Polarity
directional Polarity Control
Control Control
I I l i
DIOZ VDD vss DUAL DIR LP TSW Dl01 LP FR VI v4 Vs
961001EBA2
O TOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor devices in general can
malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing
TOSHIBA products, to observe standards of safety, and to avoid Situations in which a malfunction or failure of a TOSHIBA product could cause loss
of human life, bodily injury or damage to property. in developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions and conditions set forth in the
TOSHIBA Semiconductor Reliability Handbook.
8 The products described in this document are subject to foreign exchange and foreign trade control laws.
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA
CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license Is granted
b implication or otherwise under any intellectual propert or other rights of TOSHIBA CORPORATION or others.
0 T e information contained herein is subject to change wit out notice.
1997-04-07 1/7
TOSHIBA
PIN ASSIGNMENT
I 031:
1PININDEX
(TOP VIEW)
1997-04-07 2/7
TOSH l BA T6A4O
PIN FUNCTIONS
PIN NAME l/O FUNCTIONS LEVEL
Ol to 068 Output Output for LCD drive signal tVDVD
DIO1, DIO2 l/O Input/output for shift data
(Shift Clock Pulse)
LP Input Input for shift clock pulse
(Frame)
Input Input for frame signal
DUAL Input (Dual 'Mode) . . .
Terminal for dual input mode or single input mode select VDD to
(Direction) V
DIR Input Input for data flow direction select SS
(Terminal Switch)
TSW Input When tied to V55 : (O1 to 068) output on the rising edge of LP
When tied to VDD : (O1 to 068) output on the falling edge of LP
VDD - Power supply for internal logic (5V)
VSS - Power supply for internal logic (0V)
V1 - Power supply for LCD drive circuit -
V4 - Power supply for LCD drive circuit
V5 - Power supply for LCD drive circuit
RELATION BETWEEN FR, DATA INPUT AND OUTPUT LEVEL
F R DATA INPUT (DIO1, DIO2) OUTPUT LEVEL
DATA INPUT FORMAT
DATA INPUT
DUAL DIR DATA FLOW
DIO1 DIO2
O1-9034
VDD VDD O68-oO35 IN IN
Vss VDD 01-)068 IN OUT
DD ss O68-sOl OUT IN
I/SS V55
1997-04-07 3/7
1997-04-07 4/7
TIMING DIAGRAM
DIR = H, DUAL = L, TSW = H
FR —| I
272 1 67 68 69 7o 71 135136137138139 203 204205 206207 2712721‘ 67 68 69 70 71 135136137138139
memmmmmm
Ist (IN)
LLSI 00
(om) |_‘1 : I-1
0101 FL = I i
r—an (IN)
LLI DIOZ
5 (our)
3rd (IN)
LLI DIOZ
5 (our)
4th (IN)
DIOZ I I
LLSI (OUT)
T6A40 - 4
TOSHIBA
TOSH IBA T6A40
ABSOLUTE MAXIMUM RATINGS
(Ensure that the following conditions are maintained, VDD2-Vr2V42?cV5, Vss---0V)
ITEM SYMBOL PIN NAME RATING UNIT
Supply Voltage 1 VDD VDD -0.3 to 7.0 V
Supply Voltage 2 V1 V1 VDD - 30.0 to VDD + 0.3 V
Supply Voltage 3 V4 V4 VDD~3O.0 to VDD+0-3 V
Supply Voltage 4 V5 V5 VDD-30.0 to VDD+O.3 V
Input Voltage VIN (*1) -0.3 to VDD+0.3 V
Operating Temperature Top, - -20 to 75 "C
Storage Temperature Tstg - -55 to 125 ''C
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS
TEST CONDITIONS (Unless otherwise noted,
FR, DIR, DIO1, DIOZ, DUAL, TSW, LP
Vss=0V, VDD=4.5V to 5.5V, V5=(VDD-23)V-+ 10%, )
Ta= --20 to 75°C
ITEM SYMBOL CIR- TEST CONDITION MIN TYP. MAX UNIT PIN NAME
f"'" Voltage VDD - - 4.5 5.0 5.5 VDD
Supply Voltage VDD VDD
2 V5 - - -28 - -8.0 V5
VDD FR DIR DIO1
H Level V *2 - V ' ' '
12:31:; e IH - ( ) -0.8 DD DIOZ, DUAL,
g L Level VIL (*2) o - 0.8 LP,TSW
Output H Level VOH 'OH = -0.5mA VDD - VDD
Volta e - -0.5 D101, DIOZ
g L Level VOL IOL=0.5mA - - 0.5
O t t H Level ROH VOUT=VDD"0-5V (*3) - - 1.2
u pu *
. ROM VOUT=V1+-0.5V ( 3) - -... 1.2
- M Level -
:3; ROM VOUT=V4i0.5V (*3) - - 1.2 Ol to 068
L Level ROL VOUT=V5+0.5V (*3) - - 1.2
VDD=S.5V Input Data :
C V5: -22.5V ftyo=71Fiz
urrent fFR=35.5Hz (Duty : 1/100)
Consumption Iss - pr=7.1kHz Input Voltage : - 2.0 4.0 prA l/SS
01 to 068: H=VDD
no load L=VSS (*3)
RL Th' 3k0, CL =1500pF
VDD = 5.0V, V5 = - 7.8V, V1 = VDD -1/9(1/DD - V5), V4 = VDD - 8/9 (VDD - V5)
1997-04-07 5/7
TOSHIBA T6A40
AC CHARACTERISTICS
tCWH tCWL -
90% te-----ciit F
LP / l 10% ,
L, tosu tDHD tf
DATAIN A 'is,
DATA OUT
TEST CONDITIONS (VSS=0V, VDD=4-5 to 5.5V, V5=NDD-23)vt 10%, Ta: -20 to 75°C)
ITEM SYMBOL TEST CONDITION MIN MAX UNIT
SCP Pulse Width H tCVVH LP 30 - ns
SCP Pulse Width L tCWL LP 1 - pe;
Input Rise/Fall Time thtf LP, FR, DIO1, DIO2 - 50 ns
Data Set-upTime tDSU DIO1, DIO2 30 - ns
Data Hold Time tDHD DIO1, DIO2 50 - ns
Output Data Delay Time A (*4) tpdA DIO1, DIOZ 80 - ns
Output Data Delay Time B (*4) tde DIO1, D102 - 1 ,as
(*4) CL=10pF
Insert the bypass capacitor (0.1pF) between VDD and l/ss to decrease power supply noise.
Place the bypass capacitor as close to the LSI as possible.
1997-04-07 6/7
TOSH I BA T6A40
OUTLINE DRAWING
QFP92-P-1818-0.70B Unit : mm
69 I 47
17 5:0 2
20. 510. 5
2 13:0 2
2. 35MAX
0.15t0.15
0.15 43.05
Weight : 1.459 (Typ.)
1997-04-07 7/7
:
www.loq.com
.
