STV8216D ,MULTISTANDARD TV AUDIO PROCESSOR AND DIGITAL SOUND DEMODULATORGeneral Description1.1 OverviewThe STV82x6 is composed of three main parts: 1. TV Sound Demodulator ..
STV8216D ,MULTISTANDARD TV AUDIO PROCESSOR AND DIGITAL SOUND DEMODULATORFeatures■ 3-to-2 Analog Stereo Audio I/Os (SCART ■ NICAM, AM, FM Mono and FM 2 Carrier compatible) ..
STV8216D ,MULTISTANDARD TV AUDIO PROCESSOR AND DIGITAL SOUND DEMODULATOR® STV82x6Multistandard TV Audio Processorand Digital Sound DemodulatorDATASHEET Headphone STV82x6De ..
STV8216T ,MULTISTANDARD TV AUDIO PROCESSOR AND DIGITAL SOUND DEMODULATORfeatures, such as a ST WideSurround, Equalizer, Automatic Loudness and Smart Volume Control for tel ..
STV8223A , MULTISTANDARD VIDEO AND SOUND IF SYSTEM WITH AUDIO AND VIDEO SWITCHES
STV8223A , MULTISTANDARD VIDEO AND SOUND IF SYSTEM WITH AUDIO AND VIDEO SWITCHES
T74LS260B1 , DUAL 5 INPUT NOR GATE
T74LS374 , Octal D-type flip-flop with 3-state outputs
T7503 , T7503 Dual PCM Codec with Filters
T77V1D10-12 , Potter & Brumfield
T77V1D10-12 , Potter & Brumfield
T7933 ,ROW DRIVER LSI FOR A DOT MATRIX GRAPHIC LCDT7933 TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T7933 ROW DRIVER LSI FOR A DOT M ..
STV8206-STV8216-STV8216D-STV8216T
MULTISTANDARD TV AUDIO PROCESSOR AND DIGITAL SOUND DEMODULATOR
DATASHEET
STV82x6Multistandard TV Audio Processor
and Digital Sound Demodulator
This device incorporates the
SRS (Sound Retrieval
System) under licence from
SRS Labs, Inc.
Key Features NICAM, AM, FM Mono and FM 2 Carrier
Stereo Demodulators for all sound carriers
between 4.5 and 7 MHz Mono input provided for optimum AM
Demodulation performances Demodulation controlled by Automatic
Standard Recognition System Sound IF AGC with wide range Overmodulation and Carrier Offset recovery Smart Volume Control 5-band Equalizer & Bass/Treble Control Automatic Loudness Control Loudspeaker and Headphone outputs with Subwoofer output with Volume Control and
Programmable Bandwidth Spatial Sound Effects (ST WideSurround and
Pseudo-Stereo) SRS� 3D Surround 3-to-2 Analog Stereo Audio I/Os (SCART
compatible) with Audio Matrix Low-noise Audio Mutes and Switches I²S Output to interface with Dolby� Pro
Logic� Decoder I²C Bus-controlled Single and standard 27 MHz Crystal
Oscillator Power supplies: 3.3 V Digital, 5 V or 8V
Analog
Embedded 3.3 V Regulators Packages: SDIP56 or TQFP80
STV82x6 able of Contents
Chapter 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.1 Overview ..............................................................................................................................5
1.2 Typical Applications .........................................................................................................5
1.3 I/O Pin Description ...............................................................................................................8
Chapter 2 Demodulator Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.1 Digital Demodulator ............................................................................................................10
2.2 System Clock .....................................................................................................................14
Chapter 3 Audio Processor Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.1 Main Features ....................................................................................................................15
3.2 Smart Volume Control (SVC) .............................................................................................16
3.3 ST WideSurround ...............................................................................................................17
3.4 5-Band Audio Equalizer .....................................................................................................17
3.5 Bass/Treble Control ...........................................................................................................17
3.6 Volume/Balance Control ....................................................................................................18
3.7 Automatic Loudness Control ..............................................................................................20
3.8 Subwoofer Control .............................................................................................................20
3.9 Beeper ................................................................................................................................20
3.10 SRS™ 3D Surround (STV8226/36 only) ............................................................................21
Chapter 4 Audio Matrices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.1 Input Audio Matrix ..............................................................................................................24
4.2 Output Audio Matrix ...........................................................................................................24
Chapter 5 Additional Controls and Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
5.1 Interrupt Request ...............................................................................................................25
5.2 I²C Bus Expander ...............................................................................................................25
5.3 Stereo Flag .........................................................................................................................25
5.4 Headphone Detection ........................................................................................................25
Chapter 6 I²S Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
STV82x6
Chapter 7 Power Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
7.1 Supply Voltages .................................................................................................................27
7.2 Standby Mode ....................................................................................................................28
Chapter 8 I²C Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
8.1 I²C Address and Protocol ...................................................................................................29
8.2 STV82x6 Reset ..................................................................................................................29
Chapter 9 Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
9.1 I²C Register Map ................................................................................................................31
9.2 STV82x6 General Control Registers ..................................................................................35
9.3 Analog Block ......................................................................................................................37
9.4 Clocking .............................................................................................................................39
9.5 Demodulator .......................................................................................................................41
9.6 Demodulator Channel 1 .....................................................................................................44
9.7 Demodulator Channel 2 .....................................................................................................47
9.8 NICAM Registers ...............................................................................................................53
9.9 Zweiton ...............................................................................................................................54
9.10 Sound Preprocessing and Selection Registers ..................................................................55
9.11 Automatic Standard Recognition ........................................................................................62
9.12 Smart Volume Control ........................................................................................................66
9.13 Surround ............................................................................................................................68
9.14 5- Band Equalizer ...............................................................................................................70
9.15 Loudness/Bass & Treble ....................................................................................................72
9.16 Volume/Balance Control Registers ....................................................................................74
9.17 Subwoofer ..........................................................................................................................77
9.18 Beeper ................................................................................................................................78
Chapter 10 Input/Output Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
Chapter 11 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .84
11.1 Absolute Maximum Ratings ..............................................................................................84
11.2 Thermal Data ....................................................................................................................84
11.3 Supply ................................................................................................................................84
11.4 Crystal Recommendations ................................................................................................85
STV82x6
11.5 Analog Sound IF Signal Recommendations .....................................................................85
11.6 SIF to LS/HP/SCART Path Characteristics .......................................................................86
11.7 SCART to SCART Analog Path Characteristics ...............................................................86
11.8 SCART to I2S Output Path (via ADC) Characteristics ......................................................87
11.9 MONOIN to ADC and I2S Output Path Characteristics ....................................................87
11.10 I2S to LS/HP/SW Path Characteristics .............................................................................87
11.11 I2S to SCART Path Characteristics ..................................................................................88
11.12 Loudspeaker and Headphone Volume Control Characteristics ........................................88
11.13 MUTE Performance ...........................................................................................................88
11.14 Digital I/Os .........................................................................................................................88
11.15 I²C Bus Interface ..............................................................................................................89
Chapter 12 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91
Chapter 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93
STV82x6 General Description General Description
1.1 Overview
The STV82x6 is composed of three main parts: TV Sound Demodulator: provides all the necessary circuitry for the demodulation of audio
transmissions of European and Asian terrestrial TV broadcasts. The various transmission
standards are automatically detected and demodulated without user intervention. Audio Processor: based on DSP technology, independently controls loudspeaker, subwoofer
and headphone signals. It offers basic and advanced features, such as a ST WideSurround,
Equalizer, Automatic Loudness and Smart Volume Control for television viewer comfort. The
STV8226/36 versions can perform additionally the SRS� 3D Surround for stereo and mono
signals. Audio Matrix: 3 stereo and 1 mono external analog audio inputs to loudspeakers and
headphone, with 2 stereo external analog audio outputs (SCART compatible).
1.2 Typical Applications
Table 1: STV82x6 Version List
Figure 1: Package Ordering Information
Figure 2: Typical Application (Low-cost Stereo TV)
General Description STV82x6
Figure 3: Typical Application with Sub-woofer and Headphone
Figure 4: Typical Application Electrical Diagram for STV82x6 in SDIP56 package
General Description STV82x6
1.3 I/O Pin Description
Legend / Abbreviations for Table2:
Type: AP = Analog Power Supply DP = Digital Power Supply I = Input O = Output OD = Open Drain B = Bidirectional A = Analog
Table 2: Pin Description
STV82x6 General Description
Table 2: Pin Description (Continued)
Demodulator Block STV82x6 Demodulator Block
Note: Zweiton is the Dual (Two Tone) FM stereo or A2 system.
2.1 Digital Demodulator
2.1.1 Sound IF Signal
The Analog Sound Carrier IF is connected to STV82x6 via the SIF pin. Before Analog-to-Digital
Conversion (ADC), an Automatic Gain Control (AGC) is performed to adjust the incoming IF signal
to the full scale of the ADC. A preliminary video rejection is recommended to optimize conversion
and demodulation performances. The AGC system provides a wide range of SIF input levels and is
activated for all standards, except L/L ’. In this particular case, the sound carrier is AM-modulated
and an automatic level adjustment would only damage transmitted audio signal. A preset I²C
parameter is required to define the gain of the AGC used in Manual mode (Registers AGCC and
AGCS).
2.1.2 Demodulation
The demodulation system operates by default in Automatic mode. In this mode, the STV82x6 is able
to identify and demodulate any TV sound standard including NICAM and A2 systems (see
Table 2) without any external control via the I²C interface. It consists of the two demodulation
channels (Channel 1 = Mono Left and Channel 2 = Mono Right/Stereo) to simultaneously process
two sound carriers in order to handle all transmission modes (stereo and up to three mono
languages). The built-in Automatic Standard Recognition System (AUTOSTD) automatically
programs the appropriate bits in the I²C registers which are forced to Read-only mode for users
(see Section 9.1). The programming is optimized for each standard to be identified and
Figure 6: Demodulator Block Diagram
STV82x6 Demodulator Block
Each mono and stereo standard can be removed (or added) from the List of Standards to be
recognized by programming registers AUTO_SCKM and AUTO_SCKST, respectively. The identified
standard is displayed in register AUTO_STA T and any change to standard is flagged to the host
system via pin IRQ. This flag must be reset by re-programming the MSBs of register AUTO_CTRL
while checking the detected standard status by reading registers AUTO_STA T, NICAM_STAT and
ZWT_STAT. Moreover, the detection of Stereo mode during demodulation is also flagged in register
AUTO_STA T and on output pin ST.
Important: L/L ’ and D/K standards cannot be automatically processed because the same frequency
is used for the MONO carrier. An exclusive L/DK selection must programmed in register
AUTO_CTRL. This may be externally controlled by detecting the RF modulation sign, which is
negative for all TV standards except L/L’.
To recover out-of standard FM deviations or the Sound Carrier Frequency Offset, additional I²C
controls are provided without interfering with the Automatic Standard Recognition System
(AUTOSTD).
DK-NICAM Overmodulation Recovery: Four different FM deviation ranges can be selected (via
register AUTO_CTRL) for the DK standard while the AUTOSTD system remains active. The
maximum FM deviation is 500 kHz in DK Mono mode and 350 kHz in DK NICAM mode (limited by
overlapping FM and NICAM spectrum values). The demodulated signal peak level (proportional to
the FM deviation) is detected by the Peak Detector and written to registers PEAK_DET_STATL and
PEAK_DET_STA TR. This value is used to implement Automatic Overmodulation Detection via an
external I²C control.
Important: Only the selection of the 50 kHz FM deviation standard is compatible with the other DK-
A2* standards (DK1, DK2 or DK3). These standards must be removed from the list of standards
(registers AUTO_SCKM and AUTO_SCKST) when programming larger FM deviations reserved
only for DK-NICAM standards.
Table 3: Standards covered by the Automatic Standard Recognition System (AUTOSTD)
Demodulator Block STV82x6
Sound Carrier Frequency Offset Recovery: Both Mono and Stereo IF Carrier frequencies can be
adjusted independently (registers CAROFFSET1 and CAROFFSET2) within a large range (up to
120 kHz for standard mono FM deviations) while the AUTOSTD system remains active. The
frequency offset estimation is written in registers FM_DCL and FM_DCR (Mono Left / Channel 1
And Mono Right / Channel 2, respectively) and can be used to implement the Automatic Frequency
Control (AFC) via an external I²C control.
If required, the AUTOSTD system can be disabled (Manual mode) and the user can control all
registers including those only controlled by the AUTOSTD function when active. Manual mode is
selected in registers RESET or AUTO_SCKM.
2.1.3 Sound Preprocessing and Selection
The demodulated sound signal can be redirected to 4 different output audio channels: Loudspeaker & Subwoofer, Headphone, SCART, I²S Interface.
Each output channel can independently select the demodulator source, analog SCART or I²S inputs
using register CH_SEL.
Figure 7: Sound Preprocessing and Selection Block Diagram
STV82x6 Demodulator Block
The level of the demodulated sound may require adjusting in order to compensate for the difference
in levels between the multiple source (NICAM, FM or AM) and standard source (FM deviation wide
range from 15 to 500 kHz) signals. The correct range for all level variations (+24 to -6 dB) is
selected in registers PRE_FM and PRE_NICAM. The internal sound level of the various sources
(FM/AM, NICAM and SCART) is read in registers PEAK_DET_CTRL, PEAK_DET_STATL and
PEAK_DET_STA TR before audio processing and can be used to implement Automatic Pre-scaling
via an external I²C interface.
In Automatic mode, the STV82x6 selects and performs all appropriate de-emphasis, dematrixing,
sound selection and mute functions according to the standard and transmission mode detected.
Mono system: Mono audio signals received by an FM or AM carrier are demodulated. Left and
right audio outputs are identical. Automatic mute is applied when the mono standard cannot be
identified.
A2 systems (or Zweiton): Transmission of mono, stereo or bilingual audio signals using 2 separate
FM carriers + identification pilot. The pilot, transmitted by the second carrier, can be modulated by
two different tones in order to define Stereo or Dual-Mono mode. If not modulated, only the mono
signal is broadcast on the first carrier. Zweiton mode is read in register ZWT_STAT and described in
Table 4. In the event of poor signal detection, the audio output is switched back to FM Mono mode
(backup). In Dual Mono mode, the language (A on Channel 1, B on Channel 2) can be selected
separately for each audio output channel (Loudspeaker, Headphone, SCART or I²S) in register
CH_LANG.
Note: A2 and A2* standards are German Zweiton, while A2+ is Korean Zweiton.
NICAM systems: Transmission of mono, stereo, bilingual or trilingual audio signals using a
modulated-QPSK carrier and an FM/AM sound carrier backup. The digital QPSK modulation
broadcasts either channel stereo, dual mono, mono + data or data only. The selected NICAM mode
is read in register NICAM_STAT and described in Table 5. In the event of high bit-error rates, the
audio output is automatically switched back to the reserve sound transmission (FM/AM Mono) or
muted if there is no backup. In Dual Mono or Stereo mode with no backup, the language can be
selected separately for each audio output channel (Loudspeaker, Headphone, SCART or I²S) in
register CH_LANG.
Table 4: A2 System Transmission Modes
Demodulator Block STV82x6
Note: D1 and D2 define the two channels encoded in the NICAM packet.
2.2 System Clock
The System Clock integrates a low-jitter PLL clock and can be fully reprogrammed via registers
PLL_DIV, PLL_MD, PLL_PEH and PLL_PEL. The default values are designed for a standard
27-MHz quartz crystal frequency, which is the recommended frequency for minimizing potential
RF interference in the application. This sinusoidal clock frequency, and any harmonic products,
remains outside the TV picture and sound IF (PIF/SIF) and Band-I RF passbands and has been
selected in order to reduce the risk of potential interference to the TV IF and RF system.
However, if required, the PLL clock can be re-programmed for an other quartz crystal frequency
within a range between 23 and 30 MHz.
Note: A change in the crystal frequency is compatible with other default I²C programming values,
including those of the built-in Automatic Standard Recognition System.
Table 5: NICAM System Transmission Modes
STV82x6 Audio Processor Block Audio Processor Block
3.1 Main Features
The STV82x6 Audio Processor is based on a dedicated audio Digital Signal Processor (DSP) that
performs basic and advanced audio post-processing for 4 different output audio channels.
3.1.1 Loudspeaker and Subwoofer Features Smart Volume Control (See Note1) Spatial effects: Pseudo Stereo (for Mono source) ST WideSurround (“Movie” and “Music” modes for Stereo source) 5-band Equalizer Volume and Balance controls (See Note4) Automatic Loudness control Subwoofer (See Note4) Beeper (See Note3)
Additionally on STV8226/36 only: SRS� 3D Mono signal processing SRS� 3D Stereo signal processing
3.1.2 Headphone (See Note2) Smart Volume Control (See Note1) Bass and Treble controls Volume and Balance controls Beeper (See Note3)
Note:1 The Smart Volume Control can be used in either the loudspeaker or headphone path, but not both
at the same time. The headphone is forced into Mono mode when the subwoofer is active. The beeper is common for both the loudspeaker and the headphone. The Auto-mute function is activated when a headphone plug is detected. All audio postprocessing can be disabled.
3.1.3 SCART 1 and 2 Outputs No audio post-processing
3.1.4 I²S Output No audio post-processing
Audio Processor Block STV82x6
Note: The audio signals available on the I²S and SCART outputs are not affected by any digital or analog
matrix processing.
3.2 Smart Volume Control (SVC)
The Smart Volume Control (SVC) feature is designed to process sound level variations caused by
changes in signal sources (e.g. when switching channels) or in volume (e.g. when advertisements
are broadcast). The SVC is controlled by the SVC_ON bit in the SVC_CTRL register.
When the SVC_ON bit is set, the Smart Volume Control prevents annoying volume changes by
automatically adjusting the selected sound source (demodulator or SCART) to a programmable
reference level before audio processing. The regulation ranges from +6 dB to -30 dB with a fast
attenuation and a programmable slow amplification. The fast attenuation reduces audio peak (and
potential clipping) and slow amplification is a compromise between regulation recovery and limited
audio amplification during audio silence. The programmable output reference level must be defined
to prevent internal clipping depending on the selected audio processing boosting functions such as
Surround (up to +9 dB), Equalizer or Bass/Treble (up to +12 dB) and Loudness (up to +6 dB). When
the SVC is enabled, recommended reference values are -18 dB for the Loudspeaker path and -9 dB
for the Headphone path.
When the SVC is disabled, it acts as a wide-range prescaler (between -30 dB and +15.5 dB) before
audio-processing to prevent internal clipping depending on the selected functions (see above). If
Figure 8: Audio Processor Block Diagram
STV82x6 Audio Processor Block
required, it complements the dedicated prescaler for FM, NICAM or SCART sources. The internal
level can be measured using the peak detector.
The SVC can be used either in the Loudspeaker or Headphone path (but not both simultaneously).
When used in the Headphone path, the SVC prevents the sound level from becoming suddenly too
strong, causing ear damage. The SVC is configured in registers SVC_SEL and SVC_CTRL.
3.3 ST WideSurround
STV82x6 offers three preset ST WideSurround effects on the Loudspeaker path: Music, a concert hall effect Movie, for films on TV Simulated Stereo, which generates a pseudo-stereo effect from mono source
“ST WideSurround” is an extension of the conventional stereo concept which improves the spatial
characteristics of the sound. This could be done simply by adding more speakers and coding more
channels into the source signal as is done in the cinema, but this approach is too costly for normal
home use. The ST WideSurround system exploits a method of phase shifting to achieve a similar
result using only two speakers. It restores spatiality by adding artificial phase differences.
The Surround/Pseudo-stereo mode is automatically selected by the Automatic Standard
Recognition System (AUTOSTD) depending on the detected stereo or mono source. By default,
“Movie” is selected for Surround mode. This value may be changed to “Music” by the STS_MODE
bit in the LS_SRD_CTRL register.
Additional user controls are provided to better adapt the spatial effect to the source. The ST
WideSurround Gain (LS_STS_GAIN) and ST WideSurround Frequency (LS_STS_FREQ) registers
can be used to enhance music predominance in Music mode and theater effect + voice
predominancy in Movie mode.
3.4 5-Band Audio Equalizer
The Loudspeaker audio spectrum is split into 5 frequency bands and the gain of each of them can
be adjusted within a range from -12 dB to +12 dB in steps of 1 dB. The Audio Equalizer may be
used to pre-define frequency band enhancement features dedicated to various kinds of music or to
attenuate frequency resonances of loudspeakers or the listening environment. The Equalizer is
enabled by the EQ_ON bit in the LS_EQ_CTRL register. The Bass, Medium and Treble values are
programmed in registers LS_EQ_BAND[1:5].
3.5 Bass/Treble Control
The gain of bass and treble frequency bands for the headphone can be also tuned within a range
Figure 9: Equalizer
Audio Processor Block STV82x6
features dedicated to various kinds of music, to implement programmable Loudness or Super-bass
functions. The Headphone Bass/Treble feature is enabled by setting the BT_ON bit in the
HP_BT_CTRL register. The Bass and Treble gain values are adjusted in registers HP_BASS_GAIN
and HP_TREBLE_GAIN, respectively.
3.6 Volume/Balance Control
The STV82x6 provides a Volume/Balance Control for each of the Loudspeaker, Subwoofer and
Headphone audio outputs. Its wide range (from 0 to -96 dB in a linear scale) largely covers typical
home applications (approx. 60 dB) while maintaining a good S/N ratio. Its fine resolution (0.375 dB)
provides simple volume programming and a relative OSD scale representation. The Loudspeaker,
Subwoofer and Headphone volume values should be programmed progressively in steps of less
than 1 dB in order to prevent audible envelope variations and a minimum duration of 16 ms is
required between two successive programming commands to guarantee that there are no audible
plops during volume changes. In this case, a full 8-bit volume scan with minimum steps of 0.375 dB
will last approximately 4 s (minimum).
The Volume/Balance Control can operate in one of two different modes: In Differential mode (default value), the volume control is a common volume value for both the
Left and Right Loudspeaker and Headphone channels. In Independent mode, the volume for the Left and Right channels for Loudspeakers or
Headphone is controlled independently.
As the Loudspeaker bass frequencies are output by the Subwoofer, its reference volume is
controlled by default with the value of the LS_CVOL common volume register. The SW_GAIN
register value is used to adjust the level of the Subwoofer output in regards to this reference. In
Independent mode, the SW_GAIN register is used as a separated volume control and does not take
into account the Loudspeaker audio level.
3.6.1 Differential Mode
The common value for the Right/Left volume controls for the Loudspeaker, Subwoofer and
Headphone outputs are programmed in registers LS_CVOL, SW_GAIN and HP_CVOL,
respectively. A differential balance can be applied using registers LS_BAL and HP_BAL to adjust
the Left/Right level ratio as shown in Figure 11.
Figure 10: Volume Control
STV82x6 Audio Processor Block
3.6.2 Independent Mode
This is enabled by setting the BAL_MODE bits in both the LS_VOL_CTRL and HP_VOL_CTRL
registers to Independent mode. In this case, the register values are used to control the volume/
balance functions as described in Table 6.
3.6.3 Mute Control
An Independent Mute Control can be used to smooth audio envelope variations in order to prevent
any audible plops can be applied to all audio outputs. This feature is controlled by register
ANA_LS_HP.
A Headphone Detection Mode that will automatically mute the Loudspeaker and Subwoofer outputs
when a headphone is detected can be enabled by the HDP_ON bit in the ANA_LS_HP register. In
this case, only the Headphone output will remain active. See also Section 3.8: Subwoofer Control
and Section 5.4: Headphone Detection.
When a demodulated source is selected on the audio output, the mute is also controlled by
Automatic Standard Recognition system (AUTOSTD). In case of no mono detected or bad detection
of language without backup, the corresponding audio output is automatically muted. In case of
Figure 11: Differential Balance
Table 6: Volume/Balance Control Registers
Audio Processor Block STV82x6
3.7 Automatic Loudness Control
As the human ear does not hear the audio frequency range the same way depending on the power
of the audio source, the Loudness Control corrects this effect by sensing the volume level and then
boosting bass and treble frequencies proportionally to middle frequencies at lower volume.
While maintaining the amplitude of the 1 kHz components at an approximately constant value, the
gain values of lower and higher frequencies are automatically progressively amplified up to +18 dB
when the audio volume level decreases.The maximum treble amplification can be adjusted from dB (first order loudness) to +18 dB (second order loudness). As the volume is proportional to the
external audio amplification power, the loudness amplification threshold is programmable in order to
tune the absolute level. The Loudspeaker Loudness function is enabled by setting the LOUD_ON bit
in register LS_LOUD. The Loudness Threshold and Maximum Treble Gain values are also
programmed in this register.
Two bass cut-off frequencies are available: 40 Hz for Normal mode 120 Hz for Bass Amplified mode
The mode is selected by the LOUD_FREQ bit in register LS_LOUD (66h).
3.8 Subwoofer Control
The subwoofer signal is created by adding the bass frequency of the Left/Right Loudspeaker
channels. The Subwoofer output is enabled by setting the SW_ON bit in register ANA_LS_HP. This
will also force the Headphone output into Mono mode.
The Subwoofer Gain and Frequency Bandwidth values are programmed in registers SW_GAIN and
SW_BAND, respectively. The cut-off frequency can be adjusted from between 50 and 400 Hz in
steps of 50 Hz.
3.9 Beeper
The beeper is used to replace the audio signal with a tone on the Loudspeaker or Headphone
outputs. It can be used for various applications such as beep sounds for remote control, alarm clock
or other features.
Table 7: Headphone/Mute Register Configuration
STV82x6 Audio Processor Block
The Beeper operates in one of two modes: Pulse mode (beep applications) A tone with a programmable short duration (between 128 ms
and 1 s) is generated. Afterwards, the beeper is automatically disabled and the output is
switched back to the audio signal. Continuous mode (alarm application) A tone with a programmable long duration is generated.
Its start and stop controls must be programmed by I²C.
In both modes, it is recommended to use the mute function to smooth the audio-to-beeper and
beeper-to-audio (Continuous mode only) transitions. The second transition is automatically muted
in Pulse mode. Beeper parameters are controlled in register BEEPER_CTRL.
The beeper tone level and frequency are programmed in register BEEPER_TONE. The level (or
volume) ranges between 0 dB and -93 dB in steps of 3 dB and the tone frequency ranges between
62.2 Hz and 8 kHz in steps of 1 octave.
A beep generator is shared only by the Loudspeaker or Headphone outputs. Therefore, in the event
of simultaneous beeps when in Pulse mode, only the first beep will define the effective duration that
will be the same for both outputs.
Note: The audio output is not affected by the Automatic Mute Control of Automatic Standard Recognition
function when the beeper is activated.
3.10 SRS™ 3D Surround (STV8226/36 only)
In addition to ST WideSurround, the STV8226/36 provides SRS™ 3D Stereo and Mono outputs
which are spatial effects patented by SRS Labs. The SRS™ system is available on the IC when the
SRS_ON bit of register CUT_ID is set (STV8226/36 identification). ST and SRS™ Surround
systems cannot be used simultaneously. These signals are output only on the Loudspeaker path.
Figure 12: Pulse Mode
Figure 13: Continuous Mode
Audio Processor Block STV82x6
SRS™ creates a fully immersed three-dimensional soundfield through the use of a standard
2-speaker stereo configuration. For monaural audio, the source is first converted into a synthetic
stereo signal before creating the 3D effect. The virtual gain for the Surround and Center
components can be adjusted by registers LS_SRS_SP ACE and LS_SRS_CENTER (respectively)
in Stereo mode only. These values are used to adapt spatial effects to the source.
For ST WideSurround Sound, Stereo or Mono output mode is automatically selected by the
Automatic Standard Recognition System (AUTOSTD) according to the detected audio source. By
default, ST WideSurround Sound is selected. SRS™ Surround is selected in register
LS_SRD_CTRL.
STV82x6 Audio Matrices Audio Matrices
In addition to the sound carrier source (SIF), the STV82x6 accepts up to three analog stereo audio
inputs (2V RMS SCART compatible) and one analog mono audio input (0.5V RMS ). These different
sources can go back out through four analog stereo audio outputs which are Loudspeaker +
Subwoofer and Headphone (1V RMS ) and two compatible SCART audio outputs (2V RMS ). An extra
digital stereo output (I²S compatible) is available for interfacing with a Dolby Pro Logic Decoder or
an external Digital-to-Analog Converter (DAC).
Figure 14: Audio Matrix Block Diagram
Audio Matrices STV82x6
4.1 Input Audio Matrix
The mono input (MONOIN) and three stereo SCART inputs (AI1L, AIR1), (AI2L, AI2R) and (AI3L,
AI3R) can be switched to any audio output and the same source can be connected to different
outputs. The inputs can totally bypass the STV82x6 functions (Thru mode) via the full analog
SCART path or use the audio processing corresponding to the different audio outputs. The input
matrix is programmed in bits DSP_ISCART_SEL[1:0] of register ANA_SCART.
In Thru mode, the STV82x6 is switched into Low Power mode (Standby) and the audio matrix
configuration (ANA_SCART register) is memorized and is not reset when switched back to Full
Power mode. See Section 7.2: Standby Mode.
Before processing the audio signal, the selected analog input is converted into a digital 16-bit signal
and pre-processed. Its sound level can be prescaled within a range between -6 dB and +6 dB in
steps of 1 dB (register PRE_AUX) and for Left/Right channels (register CH_MX). The internal level
can be measured with the Peak Level Detector.
4.2 Output Audio Matrix
The Loudspeaker+Subwoofer (LSL, LSR, SW), Headphone (HPL, HPR) and I²S (SDO) outputs can
directly select two possible sources which are either the demodulated signal or the converted audio
input (from the SCART or mono input) in register CH_SEL. In the event of a dual mono source, the
language is selected in register CH_LANG.
The two analog SCART outputs (AO1L, AO1R) and (AO2L, AO2R) can be used to bypass the
STV82x6 functions by directly selecting the analog input SCARTs or the output digital source from
the demodulator or the converted audio input (with prescaling and Left/Right re-matrixing). The
SCART output is selected in register ANA_SCART and the digital source in register CH_SEL. In the
event of a dual mono source, the language is selected in register CH_LANG as other audio outputs.
In the event of a demodulator source selection, the mute is automatically controlled for all audio
outputs.
STV82x6 Additional Controls and Flags Additional Controls and Flags
5.1 Interrupt Request
The identified TV sound standard is displayed in register AUTO_STA T. Each change in the detected
standard is flagged to the host system via hardware pin IRQ. The flag must be reset by re-
programming the IRQ bit in register AUTO_CTRL and then checking the detected standard status
by reading registers AUTO_STAT, NICAM_STAT, ZWT_STAT and CH_MX.
5.2 I²C Bus Expander
Pins BUS0 and BUS1 can be used to control external switchable IF SAW filters or audio switches.
These pins can be directly programmed by register CTRL.
5.3 Stereo Flag
For Loudspeakers only, a Stereo Mode Detection flag (the ST_ID bit in register AUTO_STAT) is set
when a demodulated source is selected and a stereo standard is detected. The stereo flag is also
output on pin ST in order to control an external indicator (e.g. LED). The stereo mode is also
displayed by status register AUTO_STAT.
CAUTION: When the I²S input is selected, the stereo flag is no longer available on pin ST.
5.4 Headphone Detection
For the headphone, the HPD input can be used to automatically mute the Loudspeaker and
Subwoofer outputs when the HPD_ON bit is set in register ANA_LS_HP (active low). The HPD pin
must be set for the mute function to be active.
Figure 15: Headphone Detection
I²S Interface STV82x6 I²S Interface
A digital stereo input is available for a virtual Dolby source from an external decoder.
A digital stereo output (I²S compatible) is available for routing the demodulated signal or a
converted input audio signal into a Dolby Pro Logic Decoder or an external DAC. The STV82x6 I²S
interface drives the serial bus (SCK, WS, SDO) in Master mode in format 32.fs with a sampling
frequency (fS ) of 32 kHz. An additional master clock (MCK) in format 256.fs (fS = 8.192 MHz) is
provided if required for the slave interface.
Both Philips and Sony modes are supported with programmable Word Selection (WS) polarity
(register I2S). By default, all I²S digital outputs are set in high impedance and must be switched to
low impedance via register CTRL before use.
A clock system output (SYSCK) is also available for clock peripherals using the same quartz
frequency as the STV82x6. By default, this clock output (identical to the crystal oscillator) is set to
high impedance and must be switched to low impedance via register CTRL before use.
STV82x6 Power Supplies Power Supplies
7.1 Supply Voltages
The STV82x6 supports different power configurations due to its integrated voltage regulators.
Typically, two power supplies, which are grouped into two sets of IC pins, are required. Digital Power Supply (DPS) This supply may be either 3.3 V or 5 V if an external power
transistor is used. The DPS supplies pins VDD1, VDD2 and VDDP.
—In 3.3 V mode, the power is directly supplied to the digital power pins. In this case, the REG
pin is not used and must be connected to the ground.5 V mode requires the use of an external transistor coupled to the integrated voltage
regulator via the REG pin in order to generate a stable 3.3 V supply to the digital power pins. Analog Power Supply (APS) This supply may be either 8 V or 5V . In both cases, external
resistors are required, except for pin VDDH. The APS supplies pins VDDIF , VDDC, VDDA and
VDDH.
—The 8 V power supply is directly connected to pin VDDH and offers a 2V RMS dynamic
voltage on SCART outputs. The other analog power pins can be supplied with an 8 V or 5V
supply through external resistors. If only a 5 V power supply is available for pin VDDH, the SCART outputs will be reduced to RMS . In this case, the SEL5V bit must be set in register ANA_CTRL.
Figure 16: 3.3V / 8V or 3.3V / 5V Application
Power Supplies STV82x6
7.2 Standby Mode
The STV82x6 provides a Thru mode configuration that bypasses IC functions via a SCART I/O pin
(Full Analog Path only). In this case, only minimum power is required (Standby mode).
In Standby mode, the digital and analog power supplies are switched off, except for pins VDDA and
VDDH which are used to maintain the SCART path, the last configuration programmed for analog
matrixing (register ANA_SCART) and the power configuration (register ANA_CTRL). When
switching back to normal Full Power mode, all I²C registers are reset except for those used in
Standby mode to maintain the original configuration.
In Standby mode, the I²C bus does not operate. However, the bus can still be used by other ICs
since the I²C I/O pins (SDA and SCL) of the STV82x6 are forced into a high-impedance
configuration.
Figure 17: 5 V / 8 V or 5 V / 5 V Application
STV82x6 I²C Bus
8I²C Bus
8.1 I²C Address and Protocol
The STV82x6 I²C interface works in Slave mode and is fully compliant with I²C standards in Fast
mode (maximum frequency of 400 kHz). Two pairs of I²C chip addresses are used to connect two
STV82x6 chips to the same I²C serial bus. The device address pairs are defined by the polarity of
the ADR pin and are listed in the following table:
Protocol Description Write Protocol Read Protocol W = Write address, R = Read address, A= Acknowledge, N= No acknowledge. Sub-address is the register address pointer; this value auto-increments for both write and read.
The STV82x6 cannot immediately reply to an I²C read request when addressing DSP registers
(addresses 40h and greater).The I²C interface holds the I²C Serial Clock (SCL) line low before each
data byte is read to compensate for the latency of the DSP response (64 µs in worst case). The
implemented I²C Pulling Down mode is compatible with a Continuous or Stopped SCL when held
low (restart at high level, if stopped) and operates between 24 kHz and 400 kHz. If SCL Pulling
Down mode is not supported by the Master I²C interface, the Pulling Down system can be de-
activated by setting the SCLPD_OFF bit in register RESET. In this case, two successive reads of
the same DSP register are required and only the second one is valid (first read is ‘don’t care’). This
special protocol is no longer compatible with the I²C sub-address auto-incrementation function in
Read mode.
8.2 STV82x6 Reset
All STV82x6 features are controlled via the I²C bus. However, the device is designed to power up
into a fully working default mode without having to be sent I²C bus data to set it up.
The STV82x6 can be "reset" in 2 ways: By Software via the I²C bus: This clears all synchronous logic, except for the I²C bus registers. By Hardware via the RESET pin: In addition to clearing all synchronous logic, the RESET input
(active low) resets all the I²C bus registers to the default values listed below.
Table 8: I²C Read/Write Addresses
I²C Bus STV82x6
Table 9: RESET Default Values
STV82x6 Register List
9Register List
Note: The unused bits (defined as reserved) in I²C registers must be kept to zero.
The system clock registers (from address 08h to 0Bh) do not need to be modified if a standard MHz quartz crystal is used
The demodulator registers (from address 0Ch to 54h) default values are optimum and any change
is not recommended, except for: AGCS (0Fh) to adjust AGC gain for AM carrier in L/L ’ standard (AGC used in open loop) CAROFFSET1(22h) and CAROFFSET2(3Ah) to compensate IF carrier frequency with an out-
of-standard offset Soundlevel Prescaling PRE_FM(44h), PRE_NICAM(45h) and PRE_AUX(46h) to equalize
demodulated or external audio signal before audio processing. Peak detector registers
PEAK_DET_CTRL(4Bh) and PEAK_DET_STAT(4Ch) can be used to measure internal sound
level. Sound source selection for each audio output channel Loudspeaker+Subwoofer, Headphone,
SCART and I²S to be done using CH_SEL(49h) In Multi-lingual mode, CH_LANG(4Ah) selects separately the language for each audio output
channel. AUTO_CTRL(50h) to select between L/L ’ or D/K/K1/K2/K3 standard which can be
discriminated automatically. To be used also to change maximum FM deviation (125 kHz, by
default) in case of wide overmodulation. AUTO_SCKM(51h) and AUTO_SCKST(52h) to define the list of mono and stereo standards to
be recognized automatically.
Note: () used in reset value column means that the bit or the byte is read-only.
(S) symbol indicates that the field value is represented in signed binary format.
(*) The field AGC_ERR[4:0] (AGCS) can be written by user if the bit AGC_CMD (AGCC) is set to
one (by default controlled by AUTOSTD). T o be used to adjust manually the input gain of analog
AGC amplifier for AM carrier (L/L’).
9.1 I²C Register Map
By default, all I²C registers controlled by Automatic Standard Recognition System (AUTOSTD) are
forced to Read-only mode for the user. These registers and bits are shaded in Table 10.
Table 10: List of I²C Registers (Sheet 1 of 5)
IC General Control
Register List STV82x6
Audio Mute & Switch
Clocking
Demodulator
Demodulator Channel 1
Demodulator Channel 2
Table 10: List of I²C Registers (Sheet 2 of 5)
STV82x6 Register List
NICAM
Stereo FM
Sound Preprocessing & Selection
Table 10: List of I²C Registers (Sheet 3 of 5)
Register List STV82x6
Automatic Standard Recognition System
Audio Processing
Headphone Channel
Table 10: List of I²C Registers (Sheet 4 of 5)
STV82x6 Register List
9.2 STV82x6 General Control Registers
CUT_ID Version Identification
RESET Software Reset Register
Description
The built-in Automatic Standard Recognition System (AUTOSTD) can be disabled by bit
AUTO_OFF (when high). In this case, the Software Reset function (bits SOFT_LRESTART1 and
SOFT_LRESTART2) can be used to implement the Automatic Standard Recognition by I²C
Software. This is not required if the built-in Automatic Standard Recognition System function is used
(default).
Beeper
Address (hex): 00h
Type: R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 02h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Table 10: List of I²C Registers (Sheet 5 of 5)
Register List STV82x6
CTRL Hardware Interface Control Register
Description
Provides all hardware controls to drive external components (SAW Filter, Audio Switches) and
additional Audio Decoder (Dolby Pro Logic) via register I2S including the Master and Quartz Clocks.
Address (hex): 03h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STV82x6 Register List
I2S I²S Interface Control Register
Description
Proposes most used I²S standard (Philips and Sony) with Word Select (WS) polarity programming.
Only Master mode is supported. All interfaced chip must be set in slave mode.
9.3 Analog Block
ANA_CTRL Power Supply Configuration Control Register
Address (hex): 04h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 05h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register List STV82x6
ANA_SCART SCART Control Register
Note: SCART I²C programming (matrixing and mute control) is maintained during Standby mode
Before switching to Standby mode, the output SCART mute is recommended if the demodulated
sound source (DSP_OSCART) is selected by this output. This source might cause an audible plop
during the digital power down.
ANA_LS_HP Loudspeaker/Subwoofer/Headphone Mute Control
Address (hex): 06h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
ANA_LS/HP
Address (hex): 07h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STV82x6 Register List
9.4 Clocking
A low-jitter PLL Clock is integrated and can be fully reprogrammed using the registers described
below. By default, the programming is defined for a 27-MHz quartz crystal frequency, which is the
frequency recommended for reducing potential RF interference in the application. (See Section
2.2: System Clock.) However, if necessary, the PLL Clock can be re-programmed for other quartz
crystal frequencies within a range from 23 to 30 MHz. Other quartz crystal frequencies can be
programmed on your demand.
Note: A Crystal Frequency change is compatible with other default I²C programming including the built-in
Automatic Standard Recognition System.
PLL_DIV PLL Frequency Divider Register
Address (hex): 08h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register List STV82x6
PLL_MD PLL Coarse Frequency Control Register
PLL_PEH PLL Fine Frequency Control Register (MSBs)
PLL_PEL PLL Fine Frequency Control Register (LSBs)
Address (hex): 09h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 0Ah
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 0Bh
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STV82x6 Register List
9.5 Demodulator
DEMOD_CTRL Demodulator Control Register
DEMOD_STAT Demodulator Detection Status Register
Address (hex): 0Ch
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 0Dh
Type: R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register List STV82x6
Note: These registers allow direct access to the demodulator signal detectors.
AGCC AGC Control for IF ADC
Address (hex): 0Eh
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STV82x6 Register List
AGCS AGC Control and Status for IF ADC
Note: When AGC_CMD = 0, AGC_ERR[4:0] can be read -- indicating the input level. It can also be written
to -- presetting the AGC level which will then adjust itself to the final value.
When AGC_CMD = 1, the AGC is off and writing to AGC_ERR[4:0] directly controls the AGC
amplifier gain. Reading AGC_ERR just confirms the fixed value.
DCS DC Offset Status for IF ADC
Address (hex): 0Fh
Type: R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 10h
Type: R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register List STV82x6
9.6 Demodulator Channel 1
CARFQ1H, CARFQ1M, CARFQ1LChannel 1 Carrier DCO Frequency
Note: Carrier Freq: CARFQ1(dec).Fs/224 with Fs = 24.576 MHz (crystal oscillator frequency independent)
FIR1C[0:7] Channel 1 FIR Coefficients
Address (hex): 13h to 15h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Table 11: Mono Carrier Frequencies by System
Address (hex): 15h to 1Ch
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STV82x6 Register List
ACOEFF1 Channel 1 Baseband PLL Loop Filter Proportional Coefficient
BCOEFF1 Channel 1 Baseband PLL Loop Filter Integral Coefficient & DCO Gain
Address (hex): 1Dh
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 1Eh
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Table 12: Baseband PLL Loop Filter Adjustment (FM Mode)
Register List STV82x6
CRF1 Channel 1 Baseband PLL Demodulator Offset
CETH1 Channel 1 FM/AM Carrier Level Threshold
SQTH1 Channel 1 FM Squelch Threshold Register
Address (hex): 1Fh
Type: R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 20h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 21h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
STV82x6 Register List
CAROFFSET1 Channel 1 DCO Carrier Offset Compensation
9.7 Demodulator Channel 2
IAGCR Channel 2 Internal AGC Reference for QPSK
Address (hex): 22h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 25h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register List STV82x6
IAGCC Channel 2 Internal AGC Time Constant for QPSK
IAGCS Channel 2 Internal AGC Status for QPSK
CARFQ2H, CARFQ2M, CARFQ2LChannel 2 Carrier DCO Frequency
Address (hex): 26h
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 27h
Type: R
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Address (hex): 28H to 2Ah
Type: R/W
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
