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STS8DNF3LL
DUAL N-CHANNEL 30V
1/8October 2002
STS8DNF3LLDUAL N-CHANNEL 30V - 0.017 Ω - 8A SO-8
LOW GATE CHARGE STripFET™ II POWER MOSFET TYPICAL RDS(on) = 0.017Ω OPTIMAL RDS(on) x Qg TRADE-OFF @ 4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED
DESCRIPTIONThis application specific Power MOSFET is the second
generation of STMicroelectronis unique "Single Feature
Size™" strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
APPLICATIONS SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS FOR MOBILE PCS
ABSOLUTE MAXIMUM RATINGS(•) Pulse width limited by safe operating area.
INTERNAL SCHEMATIC DIAGRAM
STS8DNF3LL
THERMAL DATA(*) When mounted on FR-4 board with 0.5 in2 pad of Cu.
ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)OFF
ON (*)
DYNAMIC
3/8
STS8DNF3LLSWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(*)Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %.
(•)Pulse width limited by safe operating area.
ELECTRICAL CHARACTERISTICS (continued)Safe Operating Area
STS8DNF3LLOutput Characteristics
5/8
STS8DNF3LL .
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature .
STS8DNF3LL
Fig. 3: Test Circuit For Diode Recovery Behaviour
