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STM6821LWY6F ,5-Pin Supervisor with Watchdog Timer and Push-button ResetApplications Information 7Watchdog Input Current . . 7Ensuring a Valid Reset Output D ..
STM6823LWY6F ,5-Pin Supervisor with Watchdog Timer and Push-button ResetLogic Diagram (STM6321/6322/6824/WDIMR 3 46825)AI09130Note: 1. Push-pull only.VCC2. Open Drain for ..
STM6823MWY6F ,5-Pin Supervisor with Watchdog Timer and Push-button ResetFEATURES SUMMARY■ PRECISION V MONITORING OF 5V, 3.3V, Figure 1. PackageCC3V, OR 2.5V POWER SUPPLIES ..
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STM6823SWY6F ,Reset + WatchdogAbsolute maximum ratings . 18Table 5. Operating and AC measurement conditions . . . . 19Ta ..
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STM6821LWY6F-STM6823LWY6F-STM6823MWY6F-STM6824SWY6F
5-Pin Supervisor with Watchdog Timer and Push-button Reset
1/21
PRELIMINARY DATA
December 2004
STM6321/6322
STM6821/6822/6823/6824/6825
5-Pin Supervisor with
Watchdog Timer and Push-button Reset
FEATURES SUMMARY PRECISION VCC MONITORING OF 5V, 3.3V,
3V, OR 2.5V POWER SUPPLIES STM6xxxL STM6xxxM STM6xxxT STM6xxxS STM6xxxR STM6xxxZ RST OUTPUTS (ACTIVE-LOW, PUSH-PULL
OR OPEN DRAIN) RST OUTPUTS (ACTIVE-HIGH, PUSH-
PULL) 200ms (TYP) trec WATCHDOG TIMER - 1.6sec (TYP) MANUAL RESET INPUT (MR) LOW SUPPLY CURRENT - 3µA (TYP) GUARANTEED RST (RST) ASSERTION
DOWN TO VCC = 1.0V OPERATING TEMPERATURE:
–40°C to 85°C (Industrial Grade)
Table 1. Device Options
STM6321/6322/6821/6822/6823/6824/6825
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Figure 1. Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 2. Logic Diagram (STM6821/6822/6823). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 3. Logic Diagram (STM6321/6322/6824/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 4. STM6821/6822/6823 SOT23-5 Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 5. STM6321/6322/6824/6825 SOT23-5 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Active-Low, Push-pull Reset Output (RST) - STM6822/6823/6824/6825 . . . . . . . . . . . . . . . . . . . . .5
Active-Low, Open Drain Reset Output (RST) - STM6321/6322/6822 . . . . . . . . . . . . . . . . . . . . . . . .5
Push-button Reset Input (MR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Watchdog Input (WDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Active-High Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Table 3. Pin Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 6. Block Diagram (STM6xxx). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 7. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Open Drain RST Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Figure 8. STM6321/6322/6822 Open Drain RST Output with Multiple Supplies . . . . . . . . . . . . . . .7
Push-button Reset Input (STM6322/6821/6822/6823/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Watchdog Input (STM6321/6821/6822/6823/6824) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Watchdog Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Ensuring a Valid Reset Output Down to VCC= 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Interfacing to Microprocessors with Bi-directional Reset Pins . . . . . . . . . . . . . . . . . . . . . . . . .8
Figure 9. Ensuring RST Valid to VCC = 0, (Active-Low Push-pull Outputs) . . . . . . . . . . . . . . . . . . .8
Figure 10.Ensuring RST Valid to VCC = 0, (Active-High, Push-pull Outputs) . . . . . . . . . . . . . . . . . .8
Figure 11.Interfacing to Microprocessors with Bi-directional Reset I/O. . . . . . . . . . . . . . . . . . . . . . .8
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Figure 12.VCC-to-Reset Output Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Figure 13.Supply Current vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Figure 14.MR-to-Reset Output Delay vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Figure 15.Normalized Power-up trec vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Figure 16.Normalized Reset Threshold Voltage vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 17.Normalized Power-up Watchdog Time-Out Period . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 18.Voltage Output Low vs. ISINK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 19.Voltage Output High vs. ISOURCE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
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STM6321/6322/6821/6822/6823/6824/6825
Figure 20.Maximum Transient Duration vs. Reset Threshold Overdrive. . . . . . . . . . . . . . . . . . . . .13
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 5. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Figure 21.AC Testing Input/Output Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Figure 22.MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Figure 23.Watchdog Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Table 6. DC and AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Figure 24.SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Drawing . . . . . . . . . .18
Table 7. SOT23-5 – 5-lead Small Outline Transistor Package Mechanical Data . . . . . . . . . . . . .18
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 8. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Table 9. Marking Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 10. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
STM6321/6322/6821/6822/6823/6824/6825
SUMMARY DESCRIPTION
The STM6xxx Supervisors are self-contained de-
vices which provide microprocessor supervisory
functions. A precision voltage reference and com-
parator monitors the VCC input for an out-of-toler-
ance condition. When an invalid VCC condition
occurs, the reset output (RST) is forced low (or
high in the case of RST). These devices also offer
a watchdog timer (except for STM6322/6825) and/
or a push-button (MR) reset input.
These devices are available in a standard 5-pin
SOT23 package.
5/21
STM6321/6322/6821/6822/6823/6824/6825
Pin Descriptions
Active-Low, Push-pull Reset Output (RST) -
STM6822/6823/6824/6825. Pulses low when trig-
gered, and stays low whenever VCC is below the
reset threshold or when MR is a logic low. It re-
mains low for trec after either VCC rises above the
reset threshold, the watchdog triggers a reset, or
MR goes from low to high.
Active-Low, Open Drain Reset Output (RST) -
STM6321/6322/6822. Pulses low when triggered,
and stays low whenever VCC is below the reset
threshold or when MR is a logic low. It remains low
for trec after either VCC rises above the reset
threshold, the watchdog triggers a reset, or MR
goes from low to high. Connect a pull-up resistor
to supply voltage.
Push-button Reset Input (MR). A logic low on
MR asserts the reset output. Reset remains as-
serted as long as MR is low and for trec after MR
returns high. This active-low input has an internal
52kΩ pull-up. It can be driven from a TTL or CMOS
logic line, or shorted to ground with a switch.
Leave open if unused.
Watchdog Input (WDI). If WDI remains high or
low for at least 1.6sec, the internal watchdog timer
expires and reset is asserted. The internal watch-
dog timer clears while reset is asserted or when
WDI sees a rising or falling edge. The watchdog
function CAN be disabled if WDI is left unconnect-
ed or is connected to a tri-state buffer output.
Active-High Reset Output. Active-high, push-
pull reset output; inverse of RST.
Table 3. Pin Functions
Figure 6. Block Diagram (STM6xxx)
Note:1. For STM6321/6821/6822/6823/6824 For STM6322/6821/6822/6823/6825 For STM6821/ (RST output only) For STM6321/6322/6824/6825 (both RST and RST outputs)
STM6321/6322/6821/6822/6823/6824/6825
Figure 7. Hardware Hookup
Note:1. For STM6321/6821/6822/6823/6824 For STM6322/6821/6822/6823/6825 For STM6821/ (RST output only) For STM6321/6322/6824/6825 (both RST and RST outputs)
7/21
STM6321/6322/6821/6822/6823/6824/6825
OPERATION
Push-button Reset Input (STM6322/6821/6822/
6823/6825)
A logic low on MR asserts reset. Reset remains
asserted while MR is low, and for trec (see Figure
22., page 15) after it returns high. The MR input
has an internal 52kΩ pull-up resistor, allowing it to
be left open if not used. This input can be driven
with TTL/CMOS-logic levels or with open-drain/
collector outputs. Connect a normally open mo-
mentary switch from MR to GND to create a man-
ual reset function; external debounce circuitry is
not required. If MR is driven from long cables or
the device is used in a noisy environment, connect
a 0.1µF capacitor from MR to GND to provide ad-
ditional noise immunity. MR may float, or be tied to
VCC when not used.
Watchdog Input (STM6321/6821/6822/6823/
6824)
The watchdog timer can be used to detect an out-
of-control MCU. If the MCU does not toggle the
Watchdog Input (WDI) within tWD (1.6sec), the re-
set is asserted. The internal watchdog timer is
cleared by either: a reset pulse, or by toggling WDI (high-to-low or low-to-high),
which can detect pulses as short as 50ns.
The timer remains cleared and does not count for
as long as reset is asserted. As soon as reset is re-
leased, the timer starts counting.
Note: The watchdog function may be disabled by
floating WDI or tri-stating the driver connected to
WDI. When tri-stated or disconnected, the maxi-
mum allowable leakage current is 10uA and the
maximum allowable load capacitance is 200pF.
Applications Information
Watchdog Input Current. The WDI input is inter-
nally driven through a buffer and series resistor
from the watchdog counter. For minimum watch-
dog input current (minimum overall power con-
sumption), leave WDI low for the majority of the
watchdog time-out period. When high, WDI can
draw as much as 160µA. Pulsing WDI high at a
low duty cycle will reduce the effect of the large in-
put current. When WDI is left unconnected, the
watchdog timer is serviced within the watchdog
time-out period by a low-high-low pulse from the
counter chain.
STM6321/6322/6821/6822/6823/6824/6825
Ensuring a Valid Reset Output Down to
VCC =0V. The STM6xxx Supervisors are guaran-
teed to operate properly down to VCC = 1V. In ap-
plications that require valid reset levels down to
VCC = 0, a pull-down resistor to active-low outputs
(push/pull only, see Figure 9.) and a pull-up resis-
tor to active-high outputs (push/pull only, see Fig-
ure 10.) will ensure that the reset line is valid while
the reset output can no longer sink or source cur-
rent. This scheme does not work with the open
drain outputs of the STM6321/6322/6822.
The resistor value used is not critical, but it must
be large enough not to load the reset output when
VCC is above the reset threshold. For most appli-
cations, 100kΩ is adequate.
Interfacing to Microprocessors with Bi-
directional Reset Pins
Microprocessors with bi-directional reset pins can
contend with the STM6321/6322/6821/6822/6823/
6824/6825 reset output. For example, if the reset
output is driven high and the microprocessor
wants to pull it low, signal contention will result. To
prevent this from occurring, connect a 4.7kΩ resis-
tor between the reset output and the microproces-
sor’s reset I/O as in Figure 11..
9/21
STM6321/6322/6821/6822/6823/6824/6825
STM6321/6322/6821/6822/6823/6824/6825
Figure 14. MR-to-Reset Output Delay vs. Temperature
Figure 15. Normalized Power-up trec vs. Temperature
11/21
STM6321/6322/6821/6822/6823/6824/6825
Figure 16. Normalized Reset Threshold Voltage vs. Temperature
Figure 17. Normalized Power-up Watchdog Time-Out Period

Partno	Mfg	Dc	Qty	Available	Descript
STM6821LWY6F	ST	N/a	6200	avai	5-Pin Supervisor with Watchdog Timer and Push-button Reset
STM6823LWY6F	ST	N/a	260	avai	5-Pin Supervisor with Watchdog Timer and Push-button Reset
STM6823MWY6F	ST	N/a	3000	avai	5-Pin Supervisor with Watchdog Timer and Push-button Reset
STM6824SWY6F	ST	N/a	2300	avai	5-Pin Supervisor with Watchdog Timer and Push-button Reset