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STM6522AAAADG6FSTN/a77086avaidual push-button smart reset with capacitor-adjustable setup delay


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STM6522AAAADG6F
dual push-button smart reset with capacitor-adjustable setup delay
January 2012 Doc ID 17045 Rev 3 1/25
STM6522

Dual push-button
Smart Reset™ with capacitor-adjustable setup delay
Features
Dual Smart Reset™ push-button inputs with
capacitor-adjustable extended reset setup
delay (tSRC) No power-on reset Dual RST output, active-low, open-drain Fixed Smart Reset™ input logic voltage levels Broad operating voltage range 1.65 V to 5.5 V,
inactive reset output levels valid down to 1.0 V Low supply current (1.5 µA) Operating temperature:
industrial grade –40 °C to +85 °C TDFN8 package: 2 mm x 2 mm x 0.75 mm RoHS compliant
Applications
Mobile phones, smartphones e-books MP3 players Games Portable navigation devices Any application that requires delayed reset
push-button(s) response for improved system
stability
Contents STM6522
2/25 Doc ID 17045 Rev 3
Contents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1 Power supply (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Ground (VSS ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Primary Smart Reset™ input (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Secondary Smart Reset™ input (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Adjustable delay of Smart Reset™ (SRC pin) . . . . . . . . . . . . . . . . . . . . . 10
2.6 Reset output (RST1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.7 Reset output (RST2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Package footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STM6522 List of tables
Doc ID 17045 Rev 3 3/25
List of tables

Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. tSRC programmed by an ideal external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Operating and measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 5. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 6. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 17
Table 7. Parameters for landing pattern - TDFN – 8-lead 2 x 2 mm package . . . . . . . . . . . . . . . . . 18
Table 8. Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 11. Package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
List of figures STM6522
4/25 Doc ID 17045 Rev 3
List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Single-button Smart Reset™ typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Dual-button Smart Reset™ typical hookup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. Timing waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 7. STM6522 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. Supply current (ICC ) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. Smart Reset delay (tSRC ) vs. temperature, CSRC = 0.6 µF. . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 10. Reset timeout period (tREC ) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Smart Reset™ input voltage threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. AC testing input/output waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. TDFN – 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 17
Figure 14. Landing pattern - TDFN – 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 17. Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. Package marking, top view. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
STM6522 Description
Doc ID 17045 Rev 3 5/25
1 Description

The Smart Reset™ devices provide a useful feature that ensures that inadvertent short
reset push-button closures do not cause system resets as the extended Smart Reset™
delay setup periods are implemented. Once the valid Smart Reset™ input levels and setup
delay are met, the device generates an output reset pulse for a fixed timeout period (tREC).
The typical application hookup shows that either a single Smart Reset™ input, or both reset
inputs can be connected to the applications interrupt and control both the interrupt pin and
the hard reset functions. If the push-button is closed for a short time, the processor is only
interrupted. If the system still does not respond properly, holding the push-button(s) for the
extended setup time (tSRC) causes a hard reset of the processor. The Smart Reset™
feature helps significantly increase system stability and eliminates the need for a dedicated
reset button.
The STM65xx family of Smart Reset™ devices consists of low-current microprocessor reset
circuits targeted at applications such as MP3 players, portable navigation or mobile phones,
generally any application that requires delayed reset push-button(s) response for improved
system stability. The devices in the STM65xx Smart Reset™ family include various
combinations of useful features for the targeted applications.
The STM6522 has two combined Smart Reset™ inputs (SR0 and SR1) with delayed reset
setup time (tSRC) programmed by an external capacitor on the SRC pin.
Figure 1. Logic diagram
Description STM6522
6/25 Doc ID 17045 Rev 3

Figure 2. Pin connections
Figure 3. Block diagram
Table 1. Signal names
STM6522 Description
Doc ID 17045 Rev 3 7/25
Figure 4. Single-button Smart Reset™ typical hookup
Figure 5. Dual-button Smart Reset™ typical hookup
Description STM6522
8/25 Doc ID 17045 Rev 3
Figure 6. Timing waveforms
STM6522 Pin descriptions
Doc ID 17045 Rev 3 9/25
2 Pin descriptions
2.1 Power supply (VCC)

This pin is used to provide the power to the device. A 0.1 µF decoupling ceramic capacitor is
recommended to be connected between VCC and VSS pins.
2.2 Ground (VSS)

This is the supply ground for the device.
2.3 Primary Smart Reset™ input (SR0)

The primary push-button Smart Reset™ input, active-low pin is connected to the push-
button switch. The input logic voltage levels are set to a fixed voltage level and have no
internal pull-up resistor.
2.4 Secondary Smart Reset™ input (SR1)

The secondary push-button Smart Reset™ input, active-low pin is connected to the second
push-button switch. The input logic voltage levels are set to a fixed voltage level and have no
internal pull-up resistor. Keeping both Smart Reset™ inputs SR0 and SR1 active for longer
than tSRC activates the reset output pulse.
Figure 7. STM6522 timing

Reset is asserted “low” right after the Smart Reset™ setup delay (tSRC) has been met and
returns to high after the tREC period.
Pin descriptions STM6522
10/25 Doc ID 17045 Rev 3
2.5 Adjustable delay of Smart Reset™ (SRC pin)

This pin controls the setup time before the push-button action is validated by the reset
output. It is connected to an external capacitor (CSRC), which is tied to ground to provide the
desired value of setup time (tSRC).
Selected calculated tSRC and CSRC examples are given in Table 2. Refer also to Table5.

2.6 Reset output (RST1)

This output is active-low, open-drain with no internal pull-up resistor.
2.7 Reset output (RST2)

This output is active-low, open-drain with no internal pull-up resistor.
Table 2. tSRC programmed by an ideal external capacitor
At 25 ° C. Example calculations based on an ideal capacitor. During application design and component
selection it should be considered that the current flowing into the external tSRC programming capacitor
(CSRC) is on the order of 100 nA, therefore a low-leakage capacitor (ceramic or film capacitor) should be
used and placed as close as possible to the SRC pin. Also an adequate low-leakage PCB environment
should be ensured to prevent tSRC accuracy from being affected. A recommended minimum value of CSRC
is 0.1 µF. In case of quickly repeated activations of tSRC counter, an interval of 10 ms min. is needed between the activations to fully discharge CSRC , so that the next tSRC is as specified.
STM6522 Typical operating characteristics
Doc ID 17045 Rev 3 11/25 Typical operating characteristics
Figure 8. Supply current (ICC ) vs. temperature
Figure 9. Smart Reset™ delay (t ) vs. temperature, C = 0.6 µF
Typical operating characteristics STM6522
12/25 Doc ID 17045 Rev 3
Figure 10. Reset timeout period (tREC) vs. temperature
Figure 11. Smart Reset™ input voltage threshold vs. temperature
STM6522 Maximum ratings
Doc ID 17045 Rev 3 13/25
4 Maximum ratings

Stressing the device above the ratings listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in Table 4: Operating and
measurement conditions of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability. Refer also to the
STMicroelectronics™ SURE program and other relevant quality documents.
Table 3. Absolute maximum ratings Reflow at peak temperature of 260 °C. The time above 255 °C must not exceed 30 seconds.
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