STM6823TWY6F ,Reset + WatchdogSTM6321, STM6322, STM6821, STM6822,STM6823, STM6824, STM68255-pin supervisor with watchdog timer an ..
STM6823TWY6F ,Reset + WatchdogBlock diagram (STM6322/6825) . . . . . . 8Figure 10. Hardware hookup . 9Figure 11. STM6 ..
STM6824SWY6F ,5-Pin Supervisor with Watchdog Timer and Push-button ResetAbsolute Maximum Ratings . . . . . . . 14DC AND AC PARAMETERS . 15Table 5. Operating and ..
STM690RM6E ,3V Supervisor with Battery SwitchoverAbsolute Maximum Ratings . . . . . . . 22DC and AC PARAMETERS . 23Table 6. Operating and ..
STM690RM6F ,3V Supervisor with Battery SwitchoverFEATURES SUMMARY■ RST OR RST OUTPUTS Figure 1. Packages■ NVRAM SUPERVISOR FOR EXTERNAL LPSRAM■ CHIP ..
STM690SM6E ,3V Supervisor with Battery SwitchoverLogic Diagram (STM795) . . 4Table 2. Signal Names . . 4Figure 5. STM690/802/804/805 Con ..
SY58011UMG , 7GHz, 1:2 CML FANOUT BUFFER/TRANSLATOR WITH INTERNAL I/O TERMINATION
SY58011UMG , 7GHz, 1:2 CML FANOUT BUFFER/TRANSLATOR WITH INTERNAL I/O TERMINATION
SY58011UMI , 7GHz, 1:2 CML FANOUT BUFFER/TRANSLATOR WITH INTERNAL I/O TERMINATION
SY58011UMI , 7GHz, 1:2 CML FANOUT BUFFER/TRANSLATOR WITH INTERNAL I/O TERMINATION
SY58012UMG , 5GHz, 1:2 LVPECL FANOUT BUFFER/TRANSLATOR WITH INTERNAL INPUT TERMINATION
SY58012UMI , 5GHz, 1:2 LVPECL FANOUT BUFFER/TRANSLATOR WITH INTERNAL INPUT TERMINATION
STM6321RWY6F-STM6322MWY6F-STM6823RWY6F-STM6823SWY6F-STM6823TWY6F
Reset + Watchdog
June 2012 Doc ID 11110 Rev 12 1/31
STM6321, STM6322, STM6821, STM6822,
STM6823, STM6824, STM68255-pin supervisor with watchdog timer and push-button reset
Datasheet − production data
Features Precision VCC monitoring of 5, 3.3, 3, or 2.5 V
power supplies RST outputs (active low, push-pull or open
drain) RST outputs (active high, push-pull) Reset pulse width of 1.4 ms, 200 ms and
240 ms (typ.) Watchdog timeout period of 1.6 s (typ.) Manual reset input (MR) Low supply current - 3 µA (typ.) Guaranteed RST (RST) assertion down to
VCC = 1.0 V Operating temperature: –40 to +85 °C
(industrial grade) RoHS compliance
Lead-free components are compliant with the
RoHS directive
Table 1. Device summary
Contents STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM68252/31 Doc ID 11110 Rev 12
Contents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.1 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1.1 Active low, push-pull reset output (RST) - 6823/6824/6825 . . . . . . . . . . . 7
1.1.2 Active low, open drain reset output (RST) - STM6321/6322/6822 . . . . . . 7
1.1.3 Push-button reset input (MR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1.4 Watchdog input (WDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1.5 Active high reset output (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Open drain RST output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.3 Push-button reset input (STM6322/6821/6822/6823/6825) . . . . . . . . . . . 11
2.4 Watchdog input (STM6321/6821/6822/6823/6824) . . . . . . . . . . . . . . . . . 11
2.5 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.5.1 Watchdog input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.5.2 Ensuring a valid reset output down to VCC= 0 V . . . . . . . . . . . . . . . . . . 11
2.6 Interfacing to microprocessors with bidirectional reset pins . . . . . . . . . . . 12
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 List of tables
Doc ID 11110 Rev 12 3/31
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 5. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 6. DC and AC characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 7. SOT23-5 – 5-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 25
Table 8. Carrier tape dimensions for SOT23-5 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 9. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 10. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of figures STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825
4/31 Doc ID 11110 Rev 12
List of figures
Figure 1. Logic diagram (STM6821/6822/6823) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Logic diagram (STM6321/6322/6824/6825) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. STM6822/6823 SOT23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. STM6821 SOT23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5. STM6322/6825 SOT23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 6. STM6321/6824 SOT23-5 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 7. Block diagram (STM6821/6822/6823) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 8. Block diagram (STM6321/6824). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 9. Block diagram (STM6322/6825). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 10. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 11. STM6321/6322/6822 open drain RST output with multiple supplies . . . . . . . . . . . . . . . . . 10
Figure 12. Ensuring RST valid to VCC = 0, (active low push-pull outputs). . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Ensuring RST valid to VCC = 0, (active high, push-pull outputs) . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Interfacing to microprocessors with bidirectional reset I/O . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15.VCC -to-reset output delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Supply current vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. MR-to-reset output delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Normalized power-up trec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Normalized reset threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Normalized power-up watchdog timeout period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Voltage output low vs. I SINK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16Figure 22. Voltage output high vs. I SOURCE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16Figure 23. Maximum transient duration vs. reset threshold overdrive . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24. AC testing input/output waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 25. MR timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Watchdog timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. SOT23-5 – 5-lead small outline transistor package mechanical drawing. . . . . . . . . . . . . . 25
Figure 28. Carrier tape for SOT23-5 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Description
Doc ID 11110 Rev 12 5/31
1 Description
The STM6xxx supervisors are self-contained devices which provide microprocessor
supervisory functions. A precision voltage reference and comparator monitors the VCC input
for an out-of-tolerance condition. When an invalid VCC condition occurs, the reset output
(RST) is forced low (or high in the case of RST). These devices also offer a watchdog timer
(except for STM6322/6825) and/or a push-button (MR) reset input.
These devices are available in a standard 5-pin SOT23 package.
Figure 1. Logic diagram (STM6821/6822/6823) For STM6821 only.
Figure 2. Logic diagram (STM6321/6322/6824/6825) For STM6321/6824.
Table 2. Signal names
Description STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825
6/31 Doc ID 11110 Rev 12
Figure 3. STM6822/6823 SOT23-5 connections Open drain for STM6822.
Figure 4. STM6821 SOT23-5 connections Push-pull only.
Figure 5. STM6322/6825 SOT23-5 connections Open drain for STM6322. Push-pull only.
Figure 6. STM6321/6824 SOT23-5 connections Open drain for STM6321. Push-pull only.
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Description
Doc ID 11110 Rev 12 7/31
1.1 Pin descriptions
1.1.1 Active low, push-pull reset output (RST) - 6823/6824/6825
Pulses low when triggered, and stays low whenever VCC is below the reset threshold or
when MR is a logic low. It remains low for trec after either VCC rises above the reset
threshold, the watchdog triggers a reset, or MR goes from low to high.
1.1.2 Active low, open drain reset output (RST) - STM6321/6322/6822
Pulses low when triggered, and stays low whenever VCC is below the reset threshold or
when MR is a logic low. It remains low for trec after either VCC rises above the reset
threshold, the watchdog triggers a reset, or MR goes from low to high. Connect a pull-up
resistor to supply voltage.
1.1.3 Push-button reset input (MR)
A logic low on MR asserts the reset output. Reset remains asserted as long as MR is low
and for trec after MR returns high. This active low input has an internal 52 kΩ pull-up. It can
be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if
unused.
1.1.4 Watchdog input (WDI)
If WDI remains high or low for at least 1.6 s, the internal watchdog timer expires and reset is
asserted. The internal watchdog timer clears while reset is asserted or when WDI sees
a rising or falling edge. The watchdog function CAN be disabled if WDI is left unconnected
or is connected to a tristate buffer output.
1.1.5 Active high reset output (RST)
Active high, push-pull reset output; inverse of RST.
Table 3. Pin functions
Description STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825
8/31 Doc ID 11110 Rev 12
Figure 7. Block diagram (STM6821/6822/6823) Push-pull for STM6823, open drain for STM6822. Active high (push-pull) for STM6821.
Figure 8. Block diagram (STM6321/6824) Active low (open drain) for STM6321, active low (push-pull) for STM6824. Push-pull only.
Figure 9. Block diagram (STM6322/6825) Active low (open drain) for STM6322, active low (push-pull) for STM6825. Push-pull only.
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Description
Doc ID 11110 Rev 12 9/31
Figure 10. Hardware hookup For STM6321/6821/6822/6823/6824. For STM6322/6821/6822/6823/6825. For STM6821/ (RST output only). For STM6321/6322/6824/6825 (both RST and RST outputs).
Operation STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825
10/31 Doc ID 11110 Rev 12
2 Operation
2.1 Reset output
The STM6xxx supervisor asserts a reset signal to the MCU whenever VCC goes below the
reset threshold (VRST ), a watchdog timeout occurs, or when the push-button reset input
(MR) is taken low. Reset is guaranteed valid for VCC < VRST down to VCC =1 V for A = 0 to 85 °C.
During power-up, once VCC exceeds the reset threshold an internal timer keeps reset low for
the reset timeout period, trec . After this interval reset is de-asserted.
Each time RST is asserted, it stays low for at least the reset timeout period (trec ). Any time CC goes below the reset threshold the internal timer clears. The reset timer starts when CC returns above the reset threshold.
2.2 Open drain RST output
The STM6321/6322/6822 have an active low, open drain reset output. This output structure
will sink current when RST is asserted. Connect a pull-up resistor from RST to any supply
voltage up to 6 V (see Figure 11). Select a resistor value large enough to register a logic
low, and small enough to register a logic high while supplying all input current and leakage
paths connected to the reset output line. A 10 kΩ pull-up resistor is sufficient in most
applications.
Figure 11. STM6321/6322/6822 open drain RST output with multiple supplies STM6322/6822. STM6321/6822. STM6321/6322.
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Operation
Doc ID 11110 Rev 12 11/31
2.3 Push-button reset input (STM6322/6821/6822/6823/6825)
A logic low on MR asserts reset. Reset remains asserted while MR is low, and for trec (see
Figure 25 on page 19) after it returns high. The MR input has an internal 52 kΩ pull-up
resistor, allowing it to be left open if not used. This input can be driven with TTL/CMOS-logic
levels or with open drain/collector outputs. Connect a normally open momentary switch from
MR to GND to create a manual reset function; external debounce circuitry is not required. If
MR is driven from long cables or the device is used in a noisy environment, connect a 0.1 µF
capacitor from MR to GND to provide additional noise immunity. MR may float, or be tied to
VCC when not used.
2.4 Watchdog input (STM6321/6821/6822/6823/6824)
The watchdog timer can be used to detect an out-of-control MCU. If the MCU does not
toggle the Watchdog Input (WDI) within tWD (1.6 sec), the reset is asserted. The internal
watchdog timer is cleared by either: a reset pulse, or
2. by toggling WDI (high to low or low to high), which can detect pulses as short as 50 ns.
The timer remains cleared and does not count for as long as reset is asserted. As soon as
reset is released, the timer starts counting.
Note: The watchdog function may be disabled by floating WDI or tristating the driver connected to
WDI. When tristated or disconnected, the maximum allowable leakage current is 10 µA and
the maximum allowable load capacitance is 200 pF.
2.5 Applications information
2.5.1 Watchdog input current
The WDI input is internally driven through a buffer and series resistor from the watchdog
counter. For minimum watchdog input current (minimum overall power consumption), leave
WDI low for the majority of the watchdog timeout period. When high, WDI can draw as much
as 160 µA. Pulsing WDI high at a low duty cycle will reduce the effect of the large input
current. When WDI is left unconnected, the watchdog timer is serviced within the watchdog
timeout period by a low-high-low pulse from the counter chain.
2.5.2 Ensuring a valid reset output down to VCC =0 V
The STM6xxx supervisors are guaranteed to operate properly down to VCC = 1 V. In
applications that require valid reset levels down to VCC = 0, a pull-down resistor to active low
outputs (push/pull only, see Figure 12 on page 12) and a pull-up resistor to active high
outputs (push/pull only, see Figure 13 on page 12) will ensure that the reset line is valid
while the reset output can no longer sink or source current. This scheme does not work with
the open drain outputs of the STM6321/6322/6822.
The resistor value used is not critical, but it must be large enough not to load the reset
output when VCC is above the reset threshold. For most applications, 100 kΩ is adequate.
Operation STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825
12/31 Doc ID 11110 Rev 12
Figure 12. Ensuring RST valid to VCC = 0, (active low push-pull outputs)
Figure 13. Ensuring RST valid to VCC = 0, (active high, push-pull outputs) This configuration does not work on open drain outputs of the STM6321/6322/6822.
2.6 Interfacing to microprocessors with bidirectional reset pins
Microprocessors with bidirectional reset pins can contend with the STM6321 / 6322 / 6821 /
6822 / 6823 / 6824 / 6825 reset output. For example, if the reset output is driven high and the
microprocessor wants to pull it low, signal contention will result. To prevent this from
occurring, connect a 4.7 kΩ resistor between the reset output and the microprocessor’s
reset I/O as in Figure14.
Figure 14. Interfacing to microprocessors with bidirectional reset I/O
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Typical operating charac-
Doc ID 11110 Rev 12 13/31 Typical operating characteristics
Figure 15.VCC -to-reset output delay vs. temperature
Figure 16. Supply current vs. temperature
Typical operating characteristics STM6321, STM6322, STM6821, STM6822, STM6823, STM6824,
14/31 Doc ID 11110 Rev 12
Figure 17. MR-to-reset output delay vs. temperature
Figure 18. Normalized power-up trec vs. temperature
STM6321, STM6322, STM6821, STM6822, STM6823, STM6824, STM6825 Typical operating charac-
Doc ID 11110 Rev 12 15/31
Figure 19. Normalized reset threshold voltage vs. temperature
Figure 20. Normalized power-up watchdog timeout period
Typical operating characteristics STM6321, STM6322, STM6821, STM6822, STM6823, STM6824,
16/31 Doc ID 11110 Rev 12
Figure 21. Voltage output low vs. ISINK
Figure 22. Voltage output high vs. I
