STM32F407ZGT6 ,High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, EthernetFeatures– Up to 138 5 V-tolerant I/Os• Core: ARM 32-bit Cortex™-M4 CPU with FPU, • Up to 15 communi ..
STM32F417VE-T6 ,High-performance and DSP with FPU, ARM Cortex-M4 MCU with 512 Kbytes Flash, 168 MHz CPU, Art Accelerator, Ethernet, HW cryptoFeatures– Up to 138 5 V-tolerant I/Os• Core: ARM 32-bit Cortex™-M4 CPU with FPU, • Up to 15 communi ..
STM32L151C8T6 ,Ultra-low-power ARM Cortex-M3 MCU with 64 Kbytes Flash, 32 MHz CPU, USB
STM32L151RBT6 ,Ultra-low-power ARM Cortex-M3 MCU with 128 Kbytes Flash, 32 MHz CPU, USB
STM32L151VBT6 ,Ultra-low-power ARM Cortex-M3 MCU with 128 Kbytes Flash, 32 MHz CPU, USB
STM32L152C8T6 ,Ultra-low-power ARM Cortex-M3 MCU with 64 Kbytes Flash, 32 MHz CPU, LCD, USB
SY10EPT20VKI , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT20VZG , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT20VZG , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT28LKG , 3V LVTTL-TO-DIFFERENTIAL LVPECL AND DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR
SY10EPT28LKG , 3V LVTTL-TO-DIFFERENTIAL LVPECL AND DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR
SY10EPT28LKI , 3V LVTTL-TO-DIFFERENTIAL LVPECL AND DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR
STM32F407ZGT6
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 512 Kbytes Flash, 168 MHz CPU, Art Accelerator
June 2013 DocID022152 Rev 4 1/185
STM32F405xxSTM32F407xxARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM, USB
OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
Datasheet - production data
Features Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions Memories Up to 1 Mbyte of Flash memory Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management 1.8 V to 3.6 V application supply and I/Os POR, PDR, PVD and BOR 4-to-26 MHz crystal oscillator Internal 16 MHz factory-trimmed RC (1% accuracy) 32 kHz oscillator for RTC with calibration Internal 32 kHz RC with calibration Low power Sleep, Stop and Standby modes
–VBAT supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode 2×12-bit D/A converters General-purpose DMA: 16-stream DMA controller with FIFOs and burst support Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Debug mode Serial wire debug (SWD) & JTAG interfaces Cortex-M4 Embedded Trace Macrocell™ Up to 140 I/O ports with interrupt capability Up to 136 fast I/Os up to 84 MHz Up to 138 5 V-tolerant I/Os Up to 15 communication interfaces Up to 3 × I2 C interfaces (SMBus/PMBus) Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2 S to achieve audio class accuracy via internal audio PLL or external clock 2 × CAN interfaces (2.0B Active) SDIO interface Advanced connectivity USB 2.0 full-speed device/host/OTG controller with on-chip PHY USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII 8- to 14-bit parallel camera interface up to 54 Mbytes/s True random number generator CRC calculation unit 96-bit unique ID RTC: subsecond accuracy, hardware calendar
Table 1. Device summary
Contents STM32F405xx, STM32F407xx2/185 DocID022152 Rev 4
Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.1 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.2 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.1 ARM® Cortex™-M4F core with embedded Flash and SRAM . . . . . . . . 19
2.2.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . 19
2.2.3 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2.4 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2.5 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 20
2.2.6 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.2.7 Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.2.8 DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.2.9 Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . 22
2.2.10 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 22
2.2.11 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 22
2.2.12 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.2.13 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.2.14 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.2.15 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.2.16 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.2.17 Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 28
2.2.18 Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . 28
2.2.19 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.2.20 VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.2.21 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2.2.22 Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.2.23 Universal synchronous/asynchronous receiver transmitters (USART) . 33
2.2.24 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.2.25 Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.2.26 Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.2.27 Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . 35
2.2.28 Ethernet MAC interface with dedicated DMA and IEEE 1588 support . 35
2.2.29 Controller area network (bxCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
DocID022152 Rev 4 3/185
STM32F405xx, STM32F407xx Contents2.2.30 Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . 36
2.2.31 Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . 36
2.2.32 Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.33 Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.34 General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.35 Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.36 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.2.37 Digital-to-analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.2.38 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.2.39 Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 745.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
5.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
5.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
5.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
5.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
5.3.2 VCAP_1/VCAP_2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
5.3.3 Operating conditions at power-up / power-down (regulator ON) . . . . . . 80
5.3.4 Operating conditions at power-up / power-down (regulator OFF) . . . . . 80
5.3.5 Embedded reset and power control block characteristics . . . . . . . . . . . 80
5.3.6 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.3.7 Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
5.3.8 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
5.3.9 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5.3.10 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
5.3.11 PLL spread spectrum clock generation (SSCG) characteristics . . . . . 102
Contents STM32F405xx, STM32F407xx4/185 DocID022152 Rev 4
5.3.12 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
5.3.13 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
5.3.14 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 108
5.3.15 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.3.16 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.3.17 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
5.3.18 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
5.3.19 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.3.20 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
5.3.21 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
5.3.22 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
5.3.23 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
5.3.24 DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
5.3.25 FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
5.3.26 Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 155
5.3.27 SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 156
5.3.28 RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1586.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
6.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
Appendix A Application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171A.1 USB OTG full speed (FS) interface solutions . . . . . . . . . . . . . . . . . . . . . 171
A.2 USB OTG high speed (HS) interface solutions . . . . . . . . . . . . . . . . . . . . 173
A.3 Ethernet interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
DocID022152 Rev 4 5/185
STM32F405xx, STM32F407xx List of tables
List of tables
Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. STM32F405xx and STM32F407xx: features and peripheral counts. . . . . . . . . . . . . . . . . . 13
Table 3. Regulator ON/OFF and internal reset ON/OFF availability. . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 4. Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 5. USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 6. Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 7. STM32F40x pin and ball definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 8. FSMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 9. Alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 10. STM32F40x register boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 11. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 12. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 13. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 14. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 15. Limitations depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . 79
Table 16. VCAP_1/VCAP_2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 17. Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 80
Table 18. Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 80
Table 19. Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 20. Typical and maximum current consumption in Run mode, code with data processing
running from Flash memory (ART accelerator enabled) or RAM . . . . . . . . . . . . . . . . . . . 83
Table 21. Typical and maximum current consumption in Run mode, code with data processing
running from Flash memory (ART accelerator disabled). . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 22. Typical and maximum current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . 87
Table 23. Typical and maximum current consumptions in Stop mode . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 24. Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . . 88
Table 25. Typical and maximum current consumptions in VBAT mode. . . . . . . . . . . . . . . . . . . . . . . . 89
Table 26. Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Table 27. Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 28. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 29. High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 30. Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 31. HSE 4-26 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 32. LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Table 33. HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Table 34. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Table 35. Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 36. PLLI2S (audio PLL) characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 37. SSCG parameters constraint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Table 38. Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Table 39. Flash memory programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Table 40. Flash memory programming with VPP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106Table 41. Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Table 42. EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Table 43. EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Table 44. ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Table 45. Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Table 46. I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
