STM32F217VGT6 ,High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, Ethernet, HW cryptoelectrical characteristics . . . . . . . 1266.3.22 Temperature sensor characteristics . . . ..
STM32F407ZGT6 ,High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, EthernetFeatures– Up to 138 5 V-tolerant I/Os• Core: ARM 32-bit Cortex™-M4 CPU with FPU, • Up to 15 communi ..
STM32F417VE-T6 ,High-performance and DSP with FPU, ARM Cortex-M4 MCU with 512 Kbytes Flash, 168 MHz CPU, Art Accelerator, Ethernet, HW cryptoFeatures– Up to 138 5 V-tolerant I/Os• Core: ARM 32-bit Cortex™-M4 CPU with FPU, • Up to 15 communi ..
STM32L151C8T6 ,Ultra-low-power ARM Cortex-M3 MCU with 64 Kbytes Flash, 32 MHz CPU, USB
STM32L151RBT6 ,Ultra-low-power ARM Cortex-M3 MCU with 128 Kbytes Flash, 32 MHz CPU, USB
STM32L151VBT6 ,Ultra-low-power ARM Cortex-M3 MCU with 128 Kbytes Flash, 32 MHz CPU, USB
SY10EPT20VKI , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT20VKI , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT20VZG , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT20VZG , 5V/3.3V LVTTL/LVCMOS-to-DIFFERENTIAL LVPECL TRANSLATOR
SY10EPT28LKG , 3V LVTTL-TO-DIFFERENTIAL LVPECL AND DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR
SY10EPT28LKG , 3V LVTTL-TO-DIFFERENTIAL LVPECL AND DIFFERENTIAL LVPECL-TO-LVTTL TRANSLATOR
STM32F217IEH6-STM32F217VGT6
High-performance ARM Cortex-M3 MCU with 512 Kbytes Flash, 120 MHz CPU, ART Accelerator, HW crypto
October 2014 DocID17050 Rev 10 1/176
STM32F215xxSTM32F217xxARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, crypto,
USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
Datasheet - production data
Features Core: ARM® 32-bit Cortex® -M3 CPU (120 MHz
max) with Adaptive real-time accelerator (ART
Accelerator™ allowing 0-wait state execution
performance from Flash memory, MPU,
150 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1) Memories Up to 1 Mbyte of Flash memory 512 bytes of OTP memory Up to 128 + 4 Kbytes of SRAM Flexible static memory controller that
supports Compact Flash, SRAM, PSRAM,
NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management From 1.8 to 3.6 V application supply+I/Os POR, PDR, PVD and BOR 4 to 26 MHz crystal oscillator Internal 16 MHz factory-trimmed RC 32 kHz oscillator for RTC with calibration Internal 32 kHz RC with calibration Low-power modes Sleep, Stop and Standby modes
–VBAT supply for RTC, 20 × 32 bit backup
registers, and optional 4 KB backup SRAM 3 × 12-bit, 0.5 µs ADCs with up to 24 channels
and up to 6 MSPS in triple interleaved mode 2 × 12-bit D/A converters General-purpose DMA: 16-stream controller
with centralized FIFOs and burst support Up to 17 timers Up to twelve 16-bit and two 32-bit timers,
up to 120 MHz, each with up to 4
IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input Debug mode: Serial wire debug (SWD), JTAG,
and Cortex-M3 Embedded Trace Macrocell™ Up to 140 I/O ports with interrupt capability: Up to 136 fast I/Os up to 60 MHz Up to 138 5 V-tolerant I/Os Up to 15 communication interfaces Up to 3 × I2 C interfaces (SMBus/PMBus) Up to 4 USARTs and 2 UARTs (7.5 Mbit/s,
ISO 7816 interface, LIN, IrDA, modem ctrl) Up to 3 SPIs (30 Mbit/s), 2 with muxed I2S
to achieve audio class accuracy via audio
PLL or external PLL 2 × CAN interfaces (2.0B Active) SDIO interface Advanced connectivity USB 2.0 full-speed device/host/OTG
controller with on-chip PHY USB 2.0 high-speed/full-speed
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII 8- to 14-bit parallel camera interface
(48 Mbyte/s max.) Cryptographic acceleration Hardware acceleration for AES 128, 192,
256, Triple DES, HASH (MD5, SHA-1) Analog true random number generator CRC calculation unit 96-bit unique ID
Table 1. Device summary
Contents STM32F21xxx
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Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 ARM® Cortex®-M3 core with embedded Flash and SRAM . . . . . . . . . . . 17
3.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 17
3.3 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 18
3.6 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.7 Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.8 DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.9 Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 20
3.10 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 20
3.11 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.12 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.13 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.14 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.15 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.16 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.16.1 Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.16.2 Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.16.3 Regulator ON/OFF and internal reset ON/OFF availability . . . . . . . . . . 25
3.17 Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 26
3.18 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.19 VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.20 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.20.1 Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.20.2 General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.20.3 Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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STM32F21xxx Contents
3.20.4 Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.20.5 Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.20.6 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.21 Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.22 Universal synchronous/asynchronous receiver transmitters
(UARTs/USARTs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.23 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.24 Inter-integrated sound (I2 S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.25 SDIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.26 Ethernet MAC interface with dedicated DMA and IEEE 1588 support . . . 32
3.27 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.28 Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 33
3.29 Universal serial bus on-the-go high-speed (OTG_HS) . . . . . . . . . . . . . . . 33
3.30 Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.31 Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.31.1 Cryptographic acceleration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.32 True random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.33 GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.34 ADCs (analog-to-digital converters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
3.35 DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.36 T emperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.37 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3.38 Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Contents STM32F21xxx
4/176 DocID17050 Rev 10
6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
6.3.2 VCAP1/VCAP2 external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
6.3.3 Operating conditions at power-up / power-down (regulator ON) . . . . . . 72
6.3.4 Operating conditions at power-up / power-down (regulator OFF) . . . . . 72
6.3.5 Embedded reset and power control block characteristics . . . . . . . . . . . 73
6.3.6 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
6.3.7 Wakeup time from low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
6.3.8 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
6.3.9 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.3.10 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
6.3.11 PLL spread spectrum clock generation (SSCG) characteristics . . . . . . 95
6.3.12 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
6.3.13 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
6.3.14 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 100
6.3.15 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6.3.16 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
6.3.17 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
6.3.18 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
6.3.19 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
6.3.20 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
6.3.21 DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
6.3.22 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
6.3.23 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
6.3.24 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
6.3.25 FSMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
6.3.26 Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 148
6.3.27 SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 148
6.3.28 RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
7.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
7.1.1 LQFP64, 10 x 10 mm 64 pin low-profile quad flat package . . . . . . . . . 150
7.1.2 LQFP100, 14 x 14 mm 100-pin low-profile quad flat package . . . . . . . 152
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STM32F21xxx Contents
7.1.3 LQFP144, 20 x 20 mm 144-pin low-profile quad flat package . . . . . . . 155
7.1.4 LQFP176, 24 × 24 176-pin low profile quad flat package . . . . . . . . . . 158
7.1.5 UFBGA176+25 10 × 10 mm ultra thin fine pitch ball grid array . . . . . . 161
7.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164