STM1816TWX7F ,Low Power Reset Circuitblock diagrams . . . . . 71.2 Pin descriptions . . . . . 71.2.1 Active-low RST output (p ..
STM1817RWX7F ,Low Power Reset CircuitLogic diagram . . . . 5Figure 2. SOT23-3 connections . . . . . . 6Figure 3. Hardware h ..
STM1817SWX7F ,Low Power Reset CircuitFeatures ■ Precision monitoring of 3 V, 3.3 V, and 5 V supply voltages■ Four outpu ..
STM32F051C8T6 ,Entry-level ARM Cortex-M0 MCU with 64 Kbytes Flash, 48 MHz CPU, motor control and CEC functionsFeatures® Core: ARM 32-bit Cortex™-M0 CPU, LQFP64 10x10 mmfrequency up to 48 MHzUFQFPN32UFQFPN48 U ..
STM32F051R8T6 ,Entry-level ARM Cortex-M0 MCU with 64 Kbytes Flash, 48 MHz CPU, motor control and CEC functionsThermal characteristics . . . . 45Table 20. General operating conditions . . . . . . . 46 ..
STM32F100C4T6B ,Mainstream Value line, ARM Cortex-M3 MCU with 16 Kbytes Flash, 24 MHz CPU, motor control and CEC functionsFeatures FBGA■ Core: ARM 32-bit Cortex™-M3 CPU– 24 MHz maximum frequency,LQFP100 14 × 14 mm1.25 DMI ..
SY10EP01VKGTR , 5V/3.3V 4-INPUT OR/NOR
SY10EP01VZC TR , 5V/3.3V 4-INPUT OR/NOR
SY10EP05VKG , 5V/3.3V DIFFERENTIAL AND/NAND
SY10EP05VKG , 5V/3.3V DIFFERENTIAL AND/NAND
SY10EP05VKGTR , 5V/3.3V DIFFERENTIAL AND/NAND
SY10EP05VKI , 5V/3.3V DIFFERENTIAL AND/NAND
STM1810MWX7F-STM1815SWX7F-STM1816RWX7F-STM1816SWX7F-STM1816TWX7F-STM1817RWX7F-STM1817SWX7F
Low Power Reset Circuit
September 2010 Doc ID11464 Rev 8 1/25
STM1810 STM1811 STM1812 STM1813
STM1815 STM1816 STM1817 STM1818Low power reset circuit
Features Precision monitoring of 3 V, 3.3 V, and 5 V
supply voltages Four output configurations: Push-pull, active-high (STM1812,1817) Push-pull, active-low (STM1810,1815) Open-drain, active-low (STM1811,1816) Open-drain, active-low with push-button
detect (STM1813,1818) Reset pulse width - 100 ms (min.) Low supply current - 4 µA (typ.) Guaranteed assertion down to VCC = 1.0 V
(0 °C to 105 °C) Factory-trimmed reset thresholds of 2.55 V,
2.88 V, 3.06 V, 4.37 V, and 4.62 V (typ.) Power supply transient immunity Push-button/manual reset detect
(STM1813/1818) Operating temperature: –40 °C to 105 °C
± 2.5% reset threshold accuracy:
(–40 °C to 105 °C) Available in the SOT23-3 package Fully compatible with DS181x and MXD181x
products.
Table 1. Device summary Active-low RST with internal pull-up resistor.
Contents STM1810/1811/1812/1813/1815/1816/1817/18182/25 Doc ID11464 Rev 8
Contents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51.1 Functional block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.1 Active-low RST output (push-pull) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.2 Active-low RST output (open-drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2.3 Active-high RST output (push-pull) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.2.4 Active-low RST output (open-drain with internal 5.5 kΩ pull-up) with
manual reset detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.2.5 VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.2.6 VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.1 Reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Push-button detect reset (STM1813/1818) . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Interfacing to bidirectional microcontrollers (MCU’s) . . . . . . . . . . . . . . . . . 9
2.4 Negative going VCC transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Valid RST output down to VCC = 0 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STM1810/1811/1812/1813/1815/1816/1817/1818 List of tables
Doc ID11464 Rev 8 3/25
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. STM1810/STM1815 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. STM1811/STM1816 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. STM1812/STM1817 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. STM1813/STM1818 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 8. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 9. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 10. SOT23-3 – 3-lead small outline transistor package mechanical data. . . . . . . . . . . . . . . . . 21
Table 11. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 12. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 13. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
List of figures STM1810/1811/1812/1813/1815/1816/1817/1818
4/25 Doc ID11464 Rev 8
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. SOT23-3 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Push-pull active-low output (STM1810/1812/1815/1817). . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Open-drain, active-low output (STM1811/1816). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 6. Open-drain, active-low output (bidirectional, manual reset detect, STM1813/1818) . . . . . . 7
Figure 7. Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Push-button manual reset with MR detect (STM1813/1818) . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 9. Manual reset timing diagram, switch bounce/debounce (STM1813/1818). . . . . . . . . . . . . 11
Figure 10. Interfacing MCUs with bidirectional reset pins (RST, open-drain, STM1811/1816) . . . . . . 11
Figure 11. Valid reset (RST) output down to VCC = 0 V (push-pull). . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 12. Valid reset (RST) output down to VCC = 0 V (push-pull). . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Supply current vs. temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. Normalized reset time-out period (trec ) vs. temperature - VOD = VTH – VCC . . . . . . . . . . . 13
Figure 15. VCC -to-reset output delay vs. temperature - VOD = VTH – VCC . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Voltage output low vs. I SINK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14Figure 17. Voltage output high vs. I SOURCE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15Figure 18. Normalized reset threshold vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Max. transient duration NOT causing reset pulse vs. reset threshold overdrive. . . . . . . . . 16
Figure 20. AC testing input/output waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. SOT23-3 – 3-lead small outline transistor package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
STM1810/1811/1812/1813/1815/1816/1817/1818 Description
Doc ID11464 Rev 8 5/25
1 Description
STM181x devices are low power reset devices used to monitor power supplies for
microcontrollers. They perform a single function: asserting a reset signal whenever VCC
supply voltage drops below a preset value and keeping it asserted until VCC has risen above
the preset threshold for a minimum period of time (trec). They provide excellent circuit
reliability without additional external components when used with +3.0 V / +3.3 V
(STM1815–STM1818), and +5 V (STM1810–STM1813) power supply systems.
A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance
condition. When an invalid VCC condition occurs, the reset output (RST) is forced low
(or high in the case of RST) and remains asserted for trec after VCC rises above the reset
threshold. The STM1813/1818 also keep reset asserted for trec after the output is
momentarily pulled to ground by an external push-button switch.
The STM1812 and STM1817 have an active-high, push-pull output. The STM1810 and
STM1815 (push-pull) and STM1811, STM1813, STM1816, and STM1818 (open-drain) have
an active-low RST output. The open-drain devices (STM1811 / STM1813 / STM1816 /
STM1818) also have an internal pull-up resistor to VCC. The STM1813 and STM1818
feature a debounced manual reset feature that asserts a reset if the RST pin is pulled low for
more than 1.5 µs. When used to initiate manual reset, RST debounces signals from devices
such as mechanical switches. For devices with this feature, the release of the external
switch triggers the reset period.
The STM181x devices are guaranteed to output the correct logic state for VCC down to
1.0 V (0 °C to +105 °C). They also provide a reset comparator designed to ignore fast
transients on VCC.
Reset thresholds are available between +2.55 V and +4.62 V. These small, low power
devices are ideal for use in portable equipment. All are available in the space-saving 3-pin
SOT23 package, and are specified from –40 °C to +105 °C.
Figure 1. Logic diagram For STM1812, STM1817.
Description STM1810/1811/1812/1813/1815/1816/1817/1818
6/25 Doc ID11464 Rev 8
Figure 2. SOT23-3 connections RST for STM1812 and STM1817.
Figure 3. Hardware hookup RST for STM1812 and STM1817 (see Table1). Only valid for STM1813 and STM1818.
Table 2. Signal names For STM1812, STM1817.
STM1810/1811/1812/1813/1815/1816/1817/1818 Description
Doc ID11464 Rev 8 7/25
1.1 Functional block diagrams
Figure 4. Push-pull active-low output (STM1810/1812/1815/1817) RST for STM1812 and STM1817.
Figure 5. Open-drain, active-low output (STM1811/1816) 5.5 kΩ internal pull-up resistor.
Figure 6. Open-drain, active-low output (bidirectional, manual reset detect,
STM1813/1818) 5.5 kΩ internal pull-up resistor.
1.2 Pin descriptions
See Figure 1 and Table 2 for a brief overview of the signals connected to this device.
1.2.1 Active-low RST output (push-pull)
Pulses low when VCC drops below VRST, and stays low as long as VCC is below the reset
threshold. It remains low for trec after VCC rises above the reset threshold.
1.2.2 Active-low RST output (open-drain)
Pulses low when VCC drops below VRST, and stays low as long as VCC is below the reset
threshold. It remains low for trec after VCC rises above the reset threshold. RST output has
an internal 5.5 kΩ pull-up resistor.
Description STM1810/1811/1812/1813/1815/1816/1817/1818
8/25 Doc ID11464 Rev 8
1.2.3 Active-high RST output (push-pull)
Pulses high when VCC drops below V RST , and stays high as long as VCC is below the reset
threshold. It remains high for trec after VCC rises above the reset threshold.
1.2.4 Active-low RST output (open-drain with internal 5.5 kΩ pull-up) with
manual reset detect
Pulses low when VCC drops below VRST, or RST is externally pulled low for at least 1.5 µs.
It remains low for tPBRST after VCC rises above the reset threshold, or after the external
manual reset is released (see Figure 9). RST output has an internal 5.5 kΩ pull-up resistor.
1.2.5 VCC
Supply voltage and input for VRST comparator.
1.2.6 VSS
Ground, is the reference for the power supply. It must be connected to the system ground.
Table 3. STM1810/STM1815
Table 4. STM1811/STM1816
Table 5. STM1812/STM1817
Table 6. STM1813/STM1818
STM1810/1811/1812/1813/1815/1816/1817/1818 Operation
Doc ID11464 Rev 8 9/25
2 Operation
2.1 Reset output
The STM181x asserts a reset signal to the microcontroller (MCU) whenever VCC goes
below the reset threshold (V RST ), and is guaranteed valid down to VCC = 1.0 V (0 °C to
105 °C). A microcontroller’s (MCU) reset input starts the MCU in a known state. The
STM1810 - STM1813/ STM1815 - STM1818 low power reset circuits assert reset to prevent
code-execution errors during power-up, power-down, and brownout conditions (Figure7).
During power-up, once VCC exceeds the reset threshold an internal timer keeps RST low for
the reset time-out period, trec . After this interval, RST returns high.
If VCC drops below the reset threshold, RST goes low. Each time RST is asserted, it stays
low for at least the reset time-out period. Any time VCC goes below the reset threshold, the
internal timer clears. The reset timer starts when VCC returns above the reset threshold.
Reset trec is also triggered by an externally initiated rising edge on the RST pin
(STM1813/STM1818), following a low signal of 1.5 µs minimum duration.
2.2 Push-button detect reset (STM1813/1818)
Many systems require push-button reset capability (Figure 8), allowing the user or external
logic circuitry to initiate reset. On the STM1813/STM1818, a logic low on RST held for
greater than 1.5 µs asserts a reset. RST deasserts following a 100 ms minimum reset time-
out delay (trec). A manual reset input shorter than 1.5 µs may release RST without the
100 ms minimum reset time-out delay. To facilitate use with mechanical switches, the
STM1813/STM1818 contain internal debounce circuitry. A debounced waveform is shown in
Figure 9 The RST output has an internal 5.5 kΩ pull-up resistor.
2.3 Interfacing to bidirectional microcontrollers (MCU’s)
As the RST output on the STM1811/STM1816 is open-drain, these devices interface easily
with MCU’s that have bidirectional reset pins. Connecting the µP supervisor’s reset (RST)
output directly to the microcontroller’s reset (RST) pin allows either device to assert reset
(Figure 10). No external pull-up resistor is required, as it is within the STM1811/STM1816.
2.4 Negative going V CC transients
The STM181x are relatively immune to negative-going VCC transients (glitches). Figure 19
shows typical transient duration versus reset comparator overdrive (for which the STM181x
will NOT generate a reset pulse). The graph was generated using a negative pulse applied
to VCC, starting at 0.5 V above the actual reset threshold and ending below it by the
magnitude indicated (comparator overdrive). The graph indicates the maximum pulse width
a negative VCC transient can have without causing a reset pulse. As the magnitude of the
transient increases (further below the threshold), the maximum allowable pulse width
decreases. Any combination of duration and overdrive which lies under the curve will NOT
generate a reset signal. T ypically, a VCC transient that goes 100 mV below the reset
threshold and lasts 20 µs or less will not cause a reset pulse. A 0.1 µF bypass capacitor
mounted as close as possible to the VCC pin provides additional transient immunity.
Operation STM1810/1811/1812/1813/1815/1816/1817/1818
10/25 Doc ID11464 Rev 8
2.5 Valid RST output down to V CC = 0 V
When VCC falls below 1 V, the RST output no longer sinks current, but becomes an open
circuit. In most systems this is not a problem, as most MCUs do not operate below 1 V.
However, in applications where RST output must be valid down to 0 V, a pull-down resistor
may be added to hold the RST output low (see Figure 11). This resistor must be large
enough to not load the RST output, and still be small enough to pull the output to ground.
A 100 kΩ resistor is recommended.
Note: The same situation applies for the active-high RST of the STM1810/1812. A 100 kΩ pull-up
resistor to VCC should be used if RST must remain valid for VCC < 1.0 V.
Figure 7. Reset timing diagram RST for STM1812 and STM1817.
Figure 8. Push-button manual reset with MR detect (STM1813/1818)
STM1810/1811/1812/1813/1815/1816/1817/1818 Operation
Doc ID11464 Rev 8 11/25
Figure 9. Manual reset timing diagram, switch bounce/debounce (STM1813/1818)
Figure 10. Interfacing MCUs with bidirectional reset pins (RST, open-drain, STM1811/1816)
Figure 11. Valid reset (RST) output down to VCC = 0 V (push-pull) ~100 kΩ resistor recommended.
Operation STM1810/1811/1812/1813/1815/1816/1817/1818
12/25 Doc ID11464 Rev 8
Figure 12. Valid reset (RST) output down to VCC = 0 V (push-pull) ~100 kΩ resistor recommended.
STM1810/1811/1812/1813/1815/1816/1817/1818 Typical operating characteristics
Doc ID11464 Rev 8 13/25 Typical operating characteristics ypical values are at TA = 25 °C.
Figure 13. Supply current vs. temperature (no load)
Figure 14. Normalized reset time-out period (trec) vs. temperature
- VOD = VTH – VCC
