STLC60133TR ,XDSL LINE DRIVERSTLC60133XDSL LINE DRIVERPRELIMINARY DATA■ LOW NOISE : 4nV/ Hz■ HIGH PEAK OUTPUT CURRENT: 500 mA■ H ..
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STLC60133TR
XDSL LINE DRIVER
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STLC60133October 2001 LOW NOISE : 4nV/ HIGH PEAK OUTPUT CURRENT: 500 mA HIGH SPEED 140MHz Gain Bandwidth 30MHz Gain Flatness 400 V/us Slew Rate LOW POWER OPERATION ±5V to ±15V Voltage Supply 12.5 mA/Amp (typ) Supply current Power reduced Current LOW SINGLE TONE DISTORTION THERMAL AND OVERLOAD PROTECTION HTSSOP28 PACKAGE -40 TO +85°C OPERATING RANGE
DESCRIPTIONThe STLC60133 is a dual amplifier featuring a high
slew rate and a large bandwidth optimized for XDSL
applications. The device is available in a HTSSOP 28
pin package (4x9 mm) with an exposed leadframe.
Thanks to its small package this line driver is suitable
for high density ADSL line card.
Two digital pins (PWDN0 and PWDN1) allow the driv-
er to work in full performance mode, in low-power
mode or two intermediate bias states.
The low-power mode biases the output stage in order
to provide a low impedance at the amplifier outputs
for back termination.
The STLC60133 is designed optimizing bandwidth
and distortion performances. For proper device oper-
ating it is necessary to work with a gain level greater
than 15.6dB.
Typical differential gain is normally +27dB, while typ-
ical common mode gain is 15.6dB
PRELIMINARY DATAXDSL LINE DRIVER
Figure 1. BLOCK DIAGRAM
STLC60133 2/9
PIN CONNECTION
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
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STLC60133
OPERATING RANGE
Notes1) All voltages values , except differential voltage , are with respect to network ground terminal .
2) Differential voltages are non-inverting input terminal with respect to the inverting input terminal
3) Specification is for device on a 4 layer board within 10 square inches of oz. copper at +85°C and 200m/s air velocity. With 0m/s air velocity
the parameter increases up to 33°C/W
PIN DESCRIPTION
Power Down ManagementThe STLC60133 provides several quiescent bias levels from full performance, to reduced bias (in three steps
through PWDN0/1 pins) or to full OFF operation (through BIAS pin). According to the different XDSL application
(both site CO and CPE), different bias levels can be chosen maintaining good MTPR performances. In the fol-
lowing table are shown the bias levels versus the PWDN values.
STLC60133 4/9
The bias level is programmed by the TTL logic level applied to the PWDN pins. The DGND pin is the logic
ground reference for the PWDN pins. For normal operation the BIAS pin shall be left open.
The BIAS control pin can be used to adjust the internal biasing and thus the quiescent current. By pulling out a
current of 0μA to 200μA, the quiescent current can be adjusted from 100% (full ON) to a full OFF condition.
However, considering the internal parameter spread to full shutdown the STLC60133 is recommended to pull
down a 250μA current from the BIAS pin. In the following figure is shown an implementation of a complete am-
plifier shutdown. To partially reduce the internal biasing also the PWDN pins can be used.
Figure 2. Logic drive of bias pin for complete Amplifier Shutdown.A thermal protection is embedded in the STLC60133. In case of thermal overload the device is shut down at
160°C and returns to normal operation when the temperature becomes lower than 145°C.
During the thermal shutdown the voltage at the BIAS pin goes to the DGND rail; when the device returns to the
normal operation the voltage at the BIAS pin goes to the positive rail. In this condition the BIAS pin can be used
as thermal overload indicator.
MAXIMUM POWER DISSIPATIONMaximum Junction Temperature allowed for proper device operation is Tj = 140°C. A Typical Thermal Resis-
tance Junction to ambient of 29°C/W can be obtained mounting the device on a 4 layer board whithin 10 square
inches of copper and having the exposed pad contacting a proper copper area . It shall be noted that the ex-
posed pad of the device is electrically connected to the VSS negative supply.
Figure 3. Shutdown and alarm circuit
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STLC60133
ELECTRICAL CHARACTERISTCSTest Conditions: (VCC = ±12V , Tamb = 0 to 70°C , Single amplifier in normal condition (PWDN0 = 1, PWDN1 = 1),
unless otherwise specified). The limits listed below are guaranted in the above temperature range (0-70°C) by
specific testing at different temperature or by product characterisation.
TRANSMISSION PATHNotes:1. The output stage of the STLC60133 is designed for maximum load current capability. As a result, shorting the output to common
can cause the STLC60133 to source or sink 1.4A. Guaranteed by product characterization.
STLC60133 6/9
ELECTRICAL CHARACTERISTICS Test conditions (VCC = ±6V, Tamb = 0 to 70°C ,Single amplifier in normal condition (PWDN0 = 1, PWDN1 = 1),
unless otherwise specified.) The limits listed below are guaranted in the above temperature range by (0-70°C)
specific testing at different temperature or by product characterisation.
TRANSMISSION PATHNotes:1. The output stage of the STLC60133 is designed for maximum load current capability. As a result, shorting the output to common
can cause the STLC60133 to source or sink 1.4A. Guaranteed by product characterization.
