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STIL04-P5
AC INRUSH CURRENT LIMITER
STIL04-P5October 2002 - Ed: 3A Inrush current limitation circuitfor off-line power
supply Dual non-sensitive unidirectional switchesina
single package Suitable when space and efficiency are critical Active after short AC line drop out witha boost
converter High repetitive forward and reverse off-state
voltage (700V)
FEATURESAC inrush current limiter
A.S.D.TM
Application Specific Discretes HIGH POWER DENSITY ADAPTER HIGH END TV POWER SUPPLY OPENED FRAME SMPS
MAIN APPLICATIONS Low consumption (Ipt= 20mA) High noise immunity:
(dV/dt> 500V/μs@ Tj=150°C) Low reverse current losses Integrated pilot driverof the power switches Monolithic ASD™ planar technologyfor better
robustness and reliability
BENEFITS
Fig. A1: Bloc Diagram.
PIN OUT DESCRIPTION
Fig. A2: Basic connection.
STIL04-P5
ABSOLUTE MAXIMUM RATINGS (Limiting value)
THERMAL PARAMETERSThe
STIL04is connectedin parallel with the bridge diode and the inrush power resistorRi (fig. A2). During
start up, the two unidirectional
ASD™ power switchesof the STIL04 are opened. The inrush current flows
through the diodesof the bridge and the external inrush power resistor Ri. Since the main converter turns
ON, the auxiliary power supply coupled with the main transformer, supplies the energy requiredto close
the two power switchesof the STIL04.At the normal state, the two bottom diodesof the bridge rectifier and
the two unidirectional switchesof the STIL04 rectify the AC line current.
When the STIL04is used witha PFC boost converter, the inrush current circuit remains active aftera short line dropout (see fig. A5).In that configuration, since the AC line disappears, the PFC controller and the
auxiliary power supplyof the STIL turns OFF. The two switchesof the STIL are opened. The output bulk
capacitor Cbis discharginganditis providing the energyto the main converter. When the AC line recovers,
the two switches remain opened and recharging inrush currentof the capacitor Cbis deviated and limited
through the resistorRi. When the capacitoris charged, the PFC turns ON again and the two switchesof the
STIL switch ON.
More details on the design and operationof the driver circuitof figure A5 canbe foundin the application
note “AN1600
- STIL: Inrush Current Limitation Device for Off-Line Power Converter”.
Functional Description
STIL04-P5
Power losses calculationsWhen the input currentis sinusoidal, the conducted power losses canbe calculatedby using the following
formula: )PVI RI outav d
outav=+ ×. () π the output average currentis 4Amps, VT0 and Rdof the electrical characteristics table canbe used. For
different output current please referto the application note
AN1600 that provides guidelinesto estimate the
correct valuesof VT0 and Rd.
ELECTRICAL CHARACTERISTICSDuring lightning surge transient voltage across the AC line, over current and over voltage stress are ap-
pliedonall the componentsof the power supply. The STIL04 can sustaina maximum peak surge currentof
500Aas definedby the combine waveform generator (8/20μs waveformas shownin fig. A3 and A4).
Special recommendations for the lightning surge immunity:- Check that the
maximum peak surge currentin the STIL
stays below the limit specified above.- Check that
no over voltages are appliedon the STIL and the bridge diode.-In orderto reduce the dynamic current stress (dIout/dt) through the structureof the STIL04,itis recom-
mendedto connecta differential mode choke coilin frontof the STIL and the bridge diode.
More details and design guidelines are providedin the application note
“AN1600- STIL: Inrush Current
Limitation Device for Off-Line Power Converter”.
LIGHTNING SURGE IMMUNITY (IEC61000-4-5)
STIL04-P5
Fig. A3: Surge test condition.
Fig. A4: Surge current waveform.
Fig. A5: Basic connection with a PFC Boost preregulator.
STIL04-P5
0.01 0.10 1.00 10.00 (A),I²t(A²s)TSM
Fig. 1-1: Non repetitive surge peak on-state cur-
rent (sinusoidal pulse) and corresponding valueof2t.
0.01 0.10 1.00 10.00 (A),I²t(A²s)TSM
Fig. 1-2: Non repetitive surge peak on-state cur-
rent (sinusoidal pulse) and corresponding valueof2t.
1.4 25 50 75 100 125 150
Ipt1 or Ipt2 [Tj] / Ipt1 or Ipt2 [Tj = 25°C]
Fig.2: Relative variationof driver trigger current
versus junction temperature (typical values).
1.2 25 50 75 100 125 150
VDpt1 orVDpt2 [Tj] / VDpt1 or VDpt2 [Tj = 25°C]
Fig.3: Relative variationof direct pilot voltage ver-
sus junction temperature (typical values).
1.E-01
1.E+00
1.E-03 1.E-02 1.E-01 1.E+00
K = [Zth(j-c)/Rth(j-c)]
Fig.4: Relative variationof thermal impedance
junctionto case versus pulse duration.
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01
1.E+02 25 50 75 100 125 150 OFF(μA)R(OUT)
Fig. 5-1: Reverse current versus junction temper-
ature without driver current (typical values).
STIL04-P5
100.0 25 50 75 100 125 150 ON(μA)R(OUT)
Fig. 5-2: Reverse current versus junction temper-
ature with driver current (typical values).
1.20 25 50 75 100 125 150(V)F
Fig.6: Forward voltage dropfor one power switch
versus junction temperatureat the peak forward
current(typical values).
0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 (A)OUT
Fig. 7-1: Peak forward voltage drop versus peak
forward output current for one power switchat= 25°C (typical and maximal values).
50 75 100 125 150 [Tj] / dV [Tj=150°C]DOUT DOUT
Fig.8: Relative variationof dV/dt immunity versus
junction temperature (typical values).
0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 (A)OUT
Fig. 7-2: Peak forward voltage drop versus peak
forward output current for one power switch at= 150°C (typical values and maximal values).
