STI5162HBB ,Low-cost interactive set-top box decoderFeatures■ Central DMA controller■ Enhanced ST20 32-bit VL-RISC CPU■ PAL/NTSC/SECAM encoder■ Unified ..
STI5167KBB ,Low-cost interactive set-top box with advanced featuresFeatures■ Advanced security ready■ Enhanced ST20 32-bit VL-RISC CPU– compatible with latest CA requ ..
STI5189-EYB ,Low-cost QPSK demodulator and MPEG2 decoder for set-top box applicationsapplications CPU– FPU, MMU, 32K instruction, 32K data, 2-way, set-associative caches– Supports OS21 ..
STI5202AUD ,Low-cost set-top box decoder for H.264 and Microsoft VC1Features– USB 2.0 host controller/PHY interface■ Single-chip, video decoder including– DVI/HDMI™ ou ..
STI5202NUD ,Low-cost set-top box decoder for H.264 and Microsoft VC1features the following embedded interfaces:● USB 2.0 host controller/PHY interface● DVI/HDMI™ outpu ..
STI5202QUD ,Low-cost set-top box decoder for H.264 and Microsoft VC1applications..5 x 2-chPCM out S/PDIFDDRPeripheral I/OSDRAM AudioL2-chSDand external interruptsAudio ..
SVC201SPA ,Electronic Tuning SystemFeatures Package Dimensions•The SVC201SPA, 201Y are varactor diodes ofunit : mmhyper abrupt junctio ..
SVC201Y ,Varactor Diode (IOCAP) for FM Receiver Electronic TuningFeatures Package Dimensions · The SVC201SPA, 201Y are varactor diodes of hyperunit:mmabrupt junctio ..
SVC202 ,Varactor Diode (IOCAP) for FM Receiver Electronic TuningFeatures Package Dimensions · Twin type FM electronic tuning-use varactor diodeunit:mmwhich excels ..
SVC202SPA ,Varactor Diode (IOCAP) for FM Receiver Electronic TuningFeatures Package Dimensions•Twin type FM electronic tuning-use varactor diodeunit : mmwhich excels ..
SVC203CP ,Varactor Diode for FM Low-Voltage Electronic Tuning UseFeatures• Dual type with a good linearity of C-V characteristic. Excels in large input characterist ..
SVC203CP ,Varactor Diode for FM Low-Voltage Electronic Tuning UseAbsolute Maximum Ratings at Ta=25°C unitReverse Voltage V 16 VRJunction Temperature Tj 125 °CStorag ..
STI5162HBB
Low-cost interactive set-top box decoder
Data BriefApril 2009 Rev 3 1/7
STi5162Low-cost interactive set-top box decoder
Features Enhanced ST20 32-bit VL-RISC CPU Unified memory interface up to 133 MHz, 16-bit wide SDR SDRAM, up to 166 MHz, 16-bit wide DDR SDRAM Programmable Flash memory interface Demodulator compatible with I and Q or IF inputs for tuner interface Channel management Digital carrier, timing & symbol recovery loops Decoding QPSK - 16 QAM - 64 QAM constellations MPEG-2 MP@ML video decoder Graphics and display 3 display planes 2D paced blitter engine with fill function Programmable transport interface (PTI) single transport stream input for DVB Central DMA controller PAL/NTSC/SECAM encoder RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC outputs. Audio subsystem simultaneous MPEG audio decode and output of Dolby streams on S/PDIF IEC958/IEC1937 digital audio output interface integrated stereo audio DAC On-chip peripherals ASC (UART) with Tx and Rx FIFOs 3 banks of 8-bit programmable I/O integrated VCXO JTAG/TAP interface Package 15 mmx 15mm PBGA240 0.8 mm pitch.
Description STi51622/7
1 Description
1.1 GeneralThe STi5162 is the latest in the family of STBus set-top box ICs providing high-performance,
low-cost system-on-chip (SoC) for MPEG processing in digital terrestrial STBs. It is derived
from the STi5107, with the addition of a DVB-T COFDM demodulator and supports multiple
platforms using a unified architecture.
The STi5162 delivers enhanced performance with respect to previous devices. Main
memory is based upon a single 16-bit external SDR SDRAM or DDR DRAM.
The display architecture of the devices is based upon a high performance blitter engine that
supports CLUT8 and RGB16 formats for background, video and OSD/graphics displays. It
makes the porting of middleware easier with improved rendering.
1.2 Applications
Figure 1. Basic terrestrial TV STBThe STi5162 is designed for low-cost basic STB applications.
Its BGA package allows the use of a simple 2-layer PCB, with all signals and power supplies
being routed through the top PCB layer. This leaves the bottom PCB layer dedicated to the
ground plane and JTAG connections.
The STi5162 provides the following features: SDR and DDR SDRAM memory interface Digital video output port (exclusive with parallel Flash) serial Flash interface for program storage serial TS input port two ASCs (UARTs)
STi5162 Description3/7
1.3 Main features Enhanced ST20 32-bit VL-RISC CPU 200-MHz, single cycle cache/4-Kbyte instruction cache, 4-Kbyte data cache,
4-Kbyte SRAM Local memory interface up to 133 MHz, 16-bit wide SDR SDRAM, up to 166 MHz, 16-bit wide DDR SDRAM Programmable Flash memory interface 3 separately configurable banks, 8/16-bits wide SRAM, peripheral, Flash, SFlash™ support Demodulator compatible with I and Q or IF inputs for tuner interface wide range carrier tracking loop for offset recovery dual analog to digital conversion signal strength indicator dedicated ADC dual ΣΔ digital split AGC for RF and BB Channel management NorDig Unified Specification (v1.0.2) capable dynamic fading compatible channel reception quality indicator out of guard interval echo synchronization impulsive noise rejection capable flexible fully-integrated digital channel filter with outstanding adjacent channel
rejection capability Digital carrier, timing & symbol recovery loops Decoding 2 K, 4 K, 8 K FFT length 5, 6, 7 and 8 MHz channel bandwidth 1/4, 1/8, 1/16, 1/32 guard interval length QPSK - 16 QAM - 64 QAM constellations hierarchical capability Viterbi soft decoder rate 1/2 supports puncture rates 1/2, 2/3, 3/4, 5/6, 7/8 Reed-Solomon decoder energy dispersal descrambler Programmable transport interface (PTI) single transport stream input support for DVB transport streams integrated DVB, ICAM descramblers MPEG-2 MP@ML video decoder fully programmable horizontal and vertical SRCs Graphics and display 3 display planes
Description STi51624/7 8 bpp CLUT graphics, 256x30 bits (AYCbCr) CLUT entries. 16 bpp true color
graphics, RGB565, ARGB1555, ARGB4444 formats. Link-list control alpha blending, antialiasing, antiflutter, antiflicker filters 2D paced blitter engine with fill function blitter based display compositor PAL/NTSC/SECAM encoder RGB, CVBS, Y/C and YUV outputs with four 10-bit DAC outputs. RGB/CVBS or
YUV/CVBS or YC/CVBS encoding of CGMS closed caption, Teletext, WSS and VPS Audio subsystem MPEG-1 layers I/II simultaneous MPEG audio decode and output of Dolby streams on S/PDIF IEC958/IEC1937 digital audio output interface integrated stereo audio DACs Central DMA controller On-chip peripherals ASC (UART) with Tx and Rx FIFOs 3 banks of 8-bit programmable I/O SPI for serial Flash support 2 SSCs for I2 C/SPI master/slave interfaces infrared receiver integrated VCXO low-power / RTC / watchdog controller flexible clock generation to operate with 4 MHz or 27 MHz external reference JTAG/TAP interface Package 15mm x 15mm PBGA240 0.8 mm pitch
STi5162 Ordering information5/7
2 Ordering information
Table 1. Ordering information
Revision history STi51626/7
3 Revision history
Table 2. Document revision history
