STI3520ACV ,MPEG AUDIO / MPEG 2 VIDEO INTEGRATED DECODERBLOCK DIAGRAMS ....................................................
Ill
STI4600 ,6 CHANNEL DOLBY AC-3 MPEG1/2 AUDIO DECODERWuan-eDem.
SGS-‘I'HOMSOH
mncmgmnmu
w.
5 CHANNEL DOLBV AC8
5mm: Emu uaw cm; mm mm
Dewa ..
STI5105ALC ,High-performance advanced SD decoder for set-top boxfeatures the ST20 CPU that is standard across the OMEGA range but boosts the clock speed to 200 MHz ..
STI5107AYA ,Low-cost interactive set-top box decoderSTi5107Low-cost interactive set-top box decoderData Brief■ Audio subsystem
STI5107CYA ,Low-cost interactive set-top box decoderFeatures– simultaneous MPEG audio decode and ■ Enhanced ST20 32-bit VL-RISC CPUoutput of Dolby stre ..
STI5107CYA ,Low-cost interactive set-top box decoderFeatures– simultaneous MPEG audio decode and ■ Enhanced ST20 32-bit VL-RISC CPUoutput of Dolby stre ..
SVC201SPA ,Electronic Tuning SystemFeatures Package Dimensions•The SVC201SPA, 201Y are varactor diodes ofunit : mmhyper abrupt junctio ..
SVC201Y ,Varactor Diode (IOCAP) for FM Receiver Electronic TuningFeatures Package Dimensions · The SVC201SPA, 201Y are varactor diodes of hyperunit:mmabrupt junctio ..
SVC202 ,Varactor Diode (IOCAP) for FM Receiver Electronic TuningFeatures Package Dimensions · Twin type FM electronic tuning-use varactor diodeunit:mmwhich excels ..
SVC202SPA ,Varactor Diode (IOCAP) for FM Receiver Electronic TuningFeatures Package Dimensions•Twin type FM electronic tuning-use varactor diodeunit : mmwhich excels ..
SVC203CP ,Varactor Diode for FM Low-Voltage Electronic Tuning UseFeatures• Dual type with a good linearity of C-V characteristic. Excels in large input characterist ..
SVC203CP ,Varactor Diode for FM Low-Voltage Electronic Tuning UseAbsolute Maximum Ratings at Ta=25°C unitReverse Voltage V 16 VRJunction Temperature Tj 125 °CStorag ..
STI3520ACV
MPEG AUDIO / MPEG 2 VIDEO INTEGRATED DECODER
£37., 1ifiifiiiii'liiliioiliiiiiif()ili]
STi3520A
MPEG AUDIO / MPEG-2 VIDEO INTEGRATED DECODER
I SINGLE CHIP IMPLEMENTING THE MPEG
DECODING FUNCTIONS OF THE STi3500A
VIDEO DECODER AND THE STi4500 AUDIO
DECODER
I ON-CHIP PLL ALLOWING FULL CIRCUIT
OPERATION WITH ONLY ONE EXTERNAL
I ACCEPTS MPEG AUDIO, VIDEO AND PRO-
GRAM STREAMS (PES)
I VIDEODECODER FULLY SUPPORT S MPEG2
MAIN PROFILE/MAN LEVEL (MP@ML)
I MPEG-2 MAIN PROFILE CCIR601 DECOD-
ING IN 16 MBITS DRAM (INCLUDING OSD)
I MPEG-2 SIMPLE PROFILE DECODIM3 IN
8MBITS DRAM
I AUTOMATIC ERROR CONCEALMENT
I ON-SCREEN DISPLAY GENERATOR : 16
COLORS/REGION, 6-BIT LUMA RESOLU-
TION (4 BITS/PEL, 4 BITS/2 PELS AND 2
BITS/PEL MODES). LINKED LIST MEMORY
MANAGEMENT
I AUDIO DECODER SUPPORTS LAYERS 1
AND 2 OF MPEG
I ALL POPULAR AUDIO OUTPUT PCM FOR-
MATS SUPPORTED
I INTEGRATED AUDIO BIT-BUFFER
I SUPPORT FOR SYNCHRONOUS AND HY-
PER-PAGE MODE (EDO) DRAMS
I PAL DECODING WITH OSD WITH 16 MBITS
DRAM. FULL SCREEN, 16 COLOR OSD IN
20 MBITS USING 5 x 4MBIT STANDARD
I STANDARD 8-BIT INTERFACE FOR MICRO.
CONTROLLER AND COMPRESSED DATA
I 3.3V POWER SUPPLY, I/Os 5V COMPAT-
IBLE, 0.5uM CMOS TECHNOLOGY
APPLICATIONS
I DBS AND DVB RECEIVERS
I DIGITALTV RECEIVER
I DIGITAL CABLETV RECEIVER
June 1995
SUMMARY DATA
DESCRIPTION
The STi3520Aamtainsan MPEG-2 videodecoder,
an MPEG audiodecoder and a PLL. The STi3520A
requires minimum support from an external micro-
controller, which is mainly required to control the
video decoder at the start of every picture.
The video decoder is a real-time video compres-
sion processorsupportingthe MPEG-1 and MPEG-
2 standards at video rates up to 720 x 480 x 60Hz
or 720 x 576 x 50Hz. Picture format conversion for
display is performed by vertical and horizontal fil-
ters. The image can also be downsampled by up
to atactor ot2. The audio decoderis compliantwith
layers 1 and 2 of the MPEG standard. Sampling
rates of 32, 44.1 and 48kHz can be used.
Audio, video and PES data streams are input
through the 8-bit data port. Time stamps are ex-
tracted automatically to aid audio/video synchroni-
zation. Undetected bitstream errors activate error
ooncealmenttunctions.
User
displayed picture through use of the on-screen
display function. These bitmaps are written directly
into the DRAM memory by the microcontroller.
PGFP1 60
(Plastic Quad Flat Pack)
ORDER CODE t STi3520ACV
This is advance information on a new pmduct now in development or undergoing evaluation. Detailsare subiect to change without notice.
CCI ''3i%13' UU'GIWLI 6H9 D
STi352OA
CONTENTS Page
I PIN DESCRIPTION ..................................................... 3
L1 PIN CONNECTIONS .................................................... 3
I2 PIN LIST w............................-............................... 4
L3 PIN CONNECTIONS SDRAM AND EDO DRAM .............................. 5
ll BLOCK DIAGRAMS .................................................... 6
III FUNCTIONAL DESCRIPTION ............................................ 8
Ill.1 STi3520A ARCHITECTURE .............................................. 8
lll.2 PACKETISED ELEMENTARY STREAM INTERFACE .......................... 8
"l.3 VIDEO DECODER w...................................-................ 8
Ill.3.1 Bitstream Buffering ..................................................... 8
Ill.3.2 Start Code Search ...................................................... 9
Ill.3.3 Decoding ............................................................. 9
llL3.4 Display B............................................................. 9
ill.3.5 Enhanced OSD ........................................................ 9
III.4 AUDIO DECODER ..................................................... 10
ms PHASE LOCKED LOOP AND CLOCK GENERATION .......................... 10
IV MEMORY EXAMPLES .................................................. 10
NA Standard DRAM ....................................................... 10
M2 Extended Data Out(EDO) DRAM .......................................... 12
IV.3 Synchronous DRAM .................................................... 12
NA Memory Size Example .................................................. 12
V SUMMARY SPECIFICATION ............................................. 13
V.1 VIDEO DECODER ..................................................... 13
v.2 AUDIO DECODER .....q....-....I......................... 14
v.3 GENERAL w........................................................... 14
mr. ttitgll, iirit'tl
I: 792923 00731.95 765 El
