STG3682QTR ,Low Voltage High Bandwidth Dual SPDT Switchfeatures are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. Al ..
STG3682QTR ,Low Voltage High Bandwidth Dual SPDT SwitchFeatures■ Ultra low power dissipation:–I = 0.2µA (Max.) at T = 85°CCC A■ Low “ON” resistance:–R = 4 ..
STG3682QTR ,Low Voltage High Bandwidth Dual SPDT SwitchElectrical characteristics . . . . . 65 Test circuits . . . . . . 106 Package mechanica ..
STG3684ADTR , Low voltage 0.5 Ω max dual SPDT switch with break-before-make
STG3684ADTR , Low voltage 0.5 Ω max dual SPDT switch with break-before-make
STG3684ADTR , Low voltage 0.5 Ω max dual SPDT switch with break-before-make
SUP85N04-03 ,N-Channel 40-V (D-S) 175C MOSFETSUP/SUB85N04-03New ProductVishay SiliconixN-Channel 40-V (D-S) 175C MOSFET
STG3682QTR
Low Voltage High Bandwidth Dual SPDT Switch
July 2007 Rev 2 1/19
STG3682 Low voltage high bandwidth dual SPDT switch
Features Ultra low power dissipation:
–ICC = 0.2µA (Max.) at TA = 85°C Low “ON” resistance:
–RON = 4.6Ω (TA = 25°C) at VCC = 4.3V
–RON = 5.8Ω (TA = 25°C) at VCC = 3.0V Wide operating voltage range:
–VCC (Opr) = 1.65V to 4.3V single supply 4.3V tolerant and 1.8V compatible threshold on
digital control input at VCC = 2.3V to 3.0V Typical bandwidth (-3dB) at 800MHz on all
channels Latch-up performance exceeds 100mA per
JESD 78, Class II ESD performance exceeds JESD22 2000-V Human body model (A114-A) USB (2.0) High speed (480Mbps) signal
switching compliant
DescriptionThe STG3682 is a high-speed CMOS low voltage
dual analog S.P .D.T. (Single Pole Dual Throw)
Switch or 2:1 Multiplexer /Demultiplexer Switch
fabricated in silicon gate C2 MOS technology. It is
designed to operate from 1.65V to 4.3V, making
this device ideal for portable applications.
The nSEL inputs are provided to control the
switch. The switch S1 is ON (they are connected
to common Ports Dn) when the nSEL input is held
high and OFF (high impedance state exists
between the two ports) when SEL is held low; the
switch S2 is ON (it is connected to common Port
D) when the nSEL input is held low and OFF (high
impedance state exists between the two ports)
when nSEL is held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage.
Table 1. Device summary
Contents STG3682
2/19
Contents Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
STG3682 Pin settings
3/19
1 Pin settings
1.1 Pin connection
Figure 1. Pin connection (top through view)
1.2 Pin description
Note: Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground.
Table 2. Pin description
Device summary STG3682
4/19
2 Device summary
Figure 2. Input equivalent circuit
Table 3. Truth table High impedance
STG3682 Maximum rating
5/19
3 Maximum rating
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
3.1 Recommended operating conditions
Table 4. Absolute maximum ratings Derate above 70ºC by 18.5mW/C
Table 5. Recommended operating conditions Truth Table guaranteed: 1.2V to 4.3V
Electrical characteristics STG3682
6/19
4 Electrical characteristics
Table 6. DC specifications
STG3682 Electrical characteristics
7/19 Note 1: ∆Ron = max |mSN-nSN|, where m = 1..4 and n = 1..4, N = 1..2 Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Table 6. DC specifications
Electrical characteristics STG3682
8/19
Table 7. AC electrical characteristics (CL = 35pF, RL = 50Ω, tr = tf ≤ 5ns)
STG3682 Electrical characteristics
9/19
Table 8. Analog switch characteristics (CL = 5pF , RL = 50Ω, TA = 25°C) Off Isolation = 20Log10 (VD/VS), VD = output. VS = input to off switch.
Table 9. USB related AC electrical characteristics
Test circuits STG3682
10/19 Test circuits
Figure 3. ON-resistance Figure 4. Bandwidth
Figure 5. OFF leakage Figure 6. Channel to channel crosstalk
Figure 7. OFF isolation
