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STD40NF03LT4STN/a4890avaiN-CHANNEL 30V
STD40NF03LT4ST,STN/a5000avaiN-CHANNEL 30V


STD40NF03LT4 ,N-CHANNEL 30VELECTRICAL CHARACTERISTICS (T = 25 °C unless otherwise specified)caseOFFSymbol Parameter Test Condi ..
STD40NF03LT4 ,N-CHANNEL 30VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0)30 VDS GSV Drain-g ..
STD40NF06LZT4 ,N-CHANNEL 60VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 60 VDS GSV Drain- ..
STD40NF06LZ-T4 ,N-CHANNEL 60VELECTRICAL CHARACTERISTICS (T = 25 °C unless otherwise specified)caseOFFSymbol Parameter Test Condi ..
STD40NF10 ,N-channel 100 V, 0.025 Ohm, 50 A DPAK low gate charge STripFET(TM) II Power MOSFETElectrical characteristics(T = 25 °C unless otherwise specified)CASE Table 4. On/off state ..
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SUB15P01-52 ,P-Channel 8-V (D-S) 175C MOSFETS-20966—Rev. C, 01-Jul-02 1SUP/SUB15P01-52Vishay SiliconixSPECIFICATIONS (T = 25C UNLESS OTHERWIS ..
SUB40N06-25L ,N-Channel Enhancement-Mode MOSFETs, Logic LevelSUP/SUB40N06-25LVishay SiliconixN-Channel 60-V (D-S), 175C MOSFET, Logic Level 

STD40NF03LT4
N-CHANNEL 30V
1/9September 2003
STD40NF03L

N-CHANNEL 30V - 0.0090 Ω - 40A DPAK
LOW GATE CHARGE STripFET™II POWER MOSFET TYPICAL RDS(on) = 0.0090 Ω @ 10 V TYPICAL Qg = 22.5 nC @ 5 V OPTIMAL RDS(on) x Qg TRADE-OFF CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4")
DESCRIPTION

This application specific Power MOSFET is the third
genaration of STMicroelectronis unique "Single Feature
Size™" strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
APPLICATIONS
SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS

(•) Current limited by the package
(••) Pulse width limited by safe operating area.
(1) ISD ≤40A, di/dt ≤350A/μs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
(2) Starting Tj = 25 oC, ID = 20A, VDD = 25V
INTERNAL SCHEMATIC DIAGRAM
STD40NF03L
THERMAL DATA
ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)

OFF
ON (*)
DYNAMIC
3/9 STD40NF03L
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(*)Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %.
(•)Pulse width limited by safe operating area.
ELECTRICAL CHARACTERISTICS (continued)
Thermal Impedance
STD40NF03L
Output Characteristics Transfer Characteristics
5/9 STD40NF03L .
Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature .
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 4: Gate Charge test Circuit

And Diode Recovery Times
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