STD3N62K3 ,N-channel 620 V, 2.2 Ohm typ., 2.7 A SuperMESH3(TM) Power MOSFET in DPAK packageFeatures R 3DS(on) 3Type V I P2DSS D D 1max1DPAKSTB3N62K3 620 V < 2.5 Ω 2.7 A 45 WIPAKSTD3N ..
STD3NA50 ,OLD PRODUCT: NOT SUITABLE FOR NEW DESIGN-INSTD3NA50N - CHANNEL ENHANCEMENT MODEPOWER MOS TRANSISTORTYPE V R IDSS DS(on) DSTD3NA50 500 V < 3 Ω ..
STD3NC50 ,N-CHANNEL 500VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 500 VDS GSV Drain ..
STD3NC50T4 ,N-CHANNEL 500VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 500 VDS GSV Drain ..
STD3NC60 ,N-CHANNEL 600VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V =0) 600 VDS GSV Drain- ..
STD3NC60T4 ,N-CHANNEL 600VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V =0) 600 VDS GSV Drain- ..
STZ6.8T , Zener diode
STZC6.8N , ESD Protection diode
SUB15P01-52 ,P-Channel 8-V (D-S) 175C MOSFETABSOLUTE MAXIMUM RATINGS (T = 25C UNLESS OTHERWISE NOTED)AParameter Symbol Limit UnitDrain-Source ..
SUB15P01-52 ,P-Channel 8-V (D-S) 175C MOSFETS-20966—Rev. C, 01-Jul-02 1SUP/SUB15P01-52Vishay SiliconixSPECIFICATIONS (T = 25C UNLESS OTHERWIS ..
SUB40N06-25L ,N-Channel Enhancement-Mode MOSFETs, Logic LevelSUP/SUB40N06-25LVishay SiliconixN-Channel 60-V (D-S), 175C MOSFET, Logic Level
STD3N62K3-STF3N62K3-STU3N62K3
N-channel 620 V, 2.2 Ohm typ., 2.7 A SuperMESH3(TM) Power MOSFET in DPAK package
August 2009 Doc ID 14894 Rev 2 1/20
STB3N62K3, STD3N62K3, STF3N62K3
STP3N62K3, STU3N62K3N-channel 620 V , 2.2 Ω , 2.7 A SuperMESH3™ Power MOSFET2P AK, DP AK, TO-220FP , TO-220, IP AK
Features 100% avalanche tested Extremely high dv/dt capability Very low intrinsic capacitances Improved diode reverse recovery
characteristics Zener-protected
Application Switching applications
DescriptionThe new SuperMESH3™ series is obtained
through the combination of a further fine tuning of
ST's well established strip-based PowerMESH™
layout with a new optimization of the vertical
structure. In addition to reducing on-resistance
significantly versus previous generation, special
attention has been taken to ensure a very good
dv/dt capability and higher margin in breakdown
voltage for the most demanding application.
Figure 1. Internal schematic diagram Limited by package
Table 1. Device summary
Contents STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K32/20 Doc ID 14894 Rev 2
Contents Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3 Electrical ratings
Doc ID 14894 Rev 2 3/20
1 Electrical ratings
Table 2. Absolute maximum ratings Limited by package Pulse width limited by safe operating area ISD ≤ 2.7 A, di/dt ≤ 200 A/µs, VDD = 80% V(BR)DSS
Table 3. Thermal data
Electrical ratings STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3
4/20 Doc ID 14894 Rev 2
Table 4. Avalanche characteristics
STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3 Electrical characteristics
Doc ID 14894 Rev 2 5/20
2 Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Table 6. Dynamic Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Table 7. Switching times
Electrical characteristics STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3
6/20 Doc ID 14894 Rev 2
Table 8. Source drain diode Pulse width limited by safe operating area Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Table 9. Gate-source Zener diode The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components
STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3 Electrical characteristics
Doc ID 14894 Rev 2 7/20
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area for TO-220,
IPAK, DPAK, D²PAK
Figure 3. Thermal impedance for TO-220,
IPAK, DPAK, D²PAK
Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP
Figure 6. Output characteristics Figure 7. Transfer characteristics
Electrical characteristics STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3
8/20 Doc ID 14894 Rev 2
Figure 8. Normalized BVDSS vs temperature Figure 9. Static drain-source on resistance
Figure 10. Gate charge vs gate-source voltage Figure 11. Capacitance variations
Figure 12. Normalized gate threshold voltage
vs temperature
Figure 13. Normalized on resistance vs
temperature
STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3 Electrical characteristics
Doc ID 14894 Rev 2 9/20
Figure 14. Source-drain diode forward
characteristics
Figure 15. Maximum avalanche energy vs
temperature
Test circuits STB3N62K3, STD3N62K3, STF3N62K3, STP3N62K3, STU3N62K3
10/20 Doc ID 14894 Rev 2 Test circuits
Figure 16. Switching times test circuit for
resistive load
Figure 17. Gate charge test circuit
Figure 18. Test circuit for inductive load
switching and diode recovery times
Figure 19. Unclamped Inductive load test
circuit
Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform
