STD10NM65N ,N-channel 650 V, 0.43 Ohm, 9 A, DPAK second generation MDmesh(TM) Power MOSFETElectrical characteristics(T =25 °C unless otherwise specified)CASE Table 5. On/off statesSymbol Pa ..
STD10PF06 ,P-CHANNEL 60VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 60 VDS GSV Drain- ..
STD10PF06-1 ,P-CHANNEL 60VSTD10PF06P-CHANNEL 60V - 0.18 Ω - 10A IPAK/DPAKSTripFET™ II POWER MOSFETTYPE V R IDSS DS(on) DSTD10 ..
STD10PF06T4 ,P-CHANNEL 60VAPPLICATIONS■ MOTOR CONTROL■ DC-DC & DC-AC CONVERTERS
STD10PF06T4 ,P-CHANNEL 60VELECTRICAL CHARACTERISTICS (T = 25 °C UNLESS OTHERWISE SPECIFIED)CASEOFFSymbol Parameter Test Condi ..
STD10PF06T4 ,P-CHANNEL 60VABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 60 VDS GSV Drain- ..
STV9379F ,VERTICAL DEFLECTION BOOSTERSTV9379FVERTICAL DEFLECTION BOOSTER.POWER AMPLIFIER.THERMAL PROTECTION.OUTPUT CURRENT UP TO 2.0APP. ..
STV9379FA ,VERTICAL DEFLECTION BOOSTERAbsolute Maximum RatingsSymbol Parameter Value UnitV S Supply Voltage (Pin 2) (see note 1) 50 VV6 F ..
STV9380A ,CLASS-D VERTICAL DEFLECTION AMPLIFIER FOR 2.5 AMP TV AND MONITOR APPLICATIONSFunctional DescriptionThe STV9380A is a vertical deflection circuit operating in Class D. Class D i ..
STV9381 ,CLASS-D VERTICAL DEFLECTION AMPLIFIER FOR 3 APP MONITOR/TV APPLICATIONS WITH 80 V INTERNAL FLYBACK GENERATORFEATURES■ HIGH EFFICIENCY POWER AMPLIFIER■ NO HEATSINK■ SPLIT SUPPLY■ INTERNAL FLYBACK GENERATOR■ O ..
STV9382 ,OPTIMWATT Class-D Vertical Deflection AmplifierFunctional DescriptionThe STV9382 is a vertical deflection circuit operating in Class D. Class D is ..
STV9382 ,OPTIMWATT Class-D Vertical Deflection Amplifierapplications, the OPTIMWATT 4 17 -V POWOUT CCSTV9382 is a Class-D vertical deflection booster 16 + ..
STD10NM65N-STF10NM65N
N-channel 650 V, 0.43 Ohm, 9 A, DPAK second generation MDmesh(TM) Power MOSFET
October 2008 Rev 3 1/17
STD10NM65N - STF10NM65NSTP10NM65N - STU10NM65NN-channel 650 V , 0.43 Ω, 9 A MDmesh™ II Power MOSFET
TO-220, TO-220FP , IPAK, DPAK
Features 100% avalanche tested Low input capacitance and gate charge Low gate input resistance
Application Switching applications
DescriptionThis series of devices implements the second
generation of MDmesh™ T echnology. This
revolutionary Power MOSFET associates a new
vertical structure to the Company’s strip layout to
yield one of the world’s lowest on-resistance and
gate charge. It is therefore suitable for the most
demanding high efficiency converters.
Figure 1. Internal schematic diagram Limited only by maximum temperature allowed
Table 1. Device summary
Contents STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N2/17
Contents Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N Electrical ratings
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1 Electrical ratings
Table 2. Absolute maximum ratings Limited only by maximum temperature allowed Pulse width limited by safe operating area ISD ≤ 9 A, di/dt ≤ 400 A/µs, VDD = 80% V(BR)DSS
Table 3. Thermal data
Table 4. Avalanche characteristics
Electrical characteristics STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N
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2 Electrical characteristics
(TCASE=25 °C unless otherwise specified)
Table 5. On/off states Characteristics value at turn off on inductive load
Table 6. Dynamic Pulsed: pulse duration = 300 µs, duty cycle 1.5% Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N Electrical characteristics
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Table 7. Switching times
Table 8. Source drain diode Pulse width limited by safe operating area Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Electrical characteristics STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N
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2.1 Electrical characteristics (curves)
Figure 2. Safe operating area for TO-220 Figure 3. Thermal impedance for TO-220
Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP
Figure 6. Safe operating area for DPAK/IPAK Figure 7. Thermal impedance for DPAK/IPAK
STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N Electrical characteristics
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Figure 8. Output characteristics Figure 9. Transfer characteristics
Figure 10. Transconductance Figure 11. Static drain-source on resistance
Figure 12. Gate charge vs gate source voltage Figure 13. Capacitance variations
Electrical characteristics STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N
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Figure 14. Normalized gate threshold voltage
vs temperature
Figure 15. Normalized on resistance vs
temperature
Figure 16. Source-drain diode forward
characteristics
Figure 17. Normalized BVDSS vs temperature
STD10NM65N - STF10NM65N - STP10NM65N - STU10NM65N Test circuit
9/17 Test circuit
Figure 18. Switching times test circuit for
resistive load
Figure 19. Gate charge test circuit
Figure 20. Test circuit for inductive load
switching and diode recovery times
Figure 21. Unclamped inductive load test
circuit
Figure 22. Unclamped inductive waveform Figure 23. Switching time waveform
