ST7FMC1K4T6 ,8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)Table of Contents15.7 RESET VALUE OF UNAVAILABLE PINS . . . 30315.8 MAXIMUM VALUES OF AVD THRES ..
ST7FMC1K4T6 ,8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)Features■ Memories– 8K to 60K dual voltage Flash Program memo-ry or ROM with read-out protection ca ..
ST7FMC2M9T6 ,8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI(TM)ABSOLUTE MAXIMUM RATINGS 24311.3 OPERATING CONDITIONS . . . . . 24511.4 SUPPLY CURRENT ..
ST7FMC2R6T6 ,8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCITHERMAL CHARACTERISTICS . 28212.3 SOLDERING AND GLUEABILITY INFORMATION . . . . 28313 ST7 ..
ST7FMC2R7T6 ,8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI(TM)THERMAL CHARACTERISTICS . 28212.3 SOLDERING AND GLUEABILITY INFORMATION . . . . 28313 ST7 ..
ST7FMC2S4T6 ,8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCIST7MC1/ST7MC28-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, FIVE TIME ..
STRF6652 , OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATORS
STRF6652 , OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATORS
STR-F6652 , OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATORS
STRF6653 , OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATORS
STRF6653 , OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATORS
STRF6653 , OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATORS
ST7FMC1K4T6-ST7FMC2S6T6
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC,BRUSHLESS MOTOR CONTROL, 5 TIMERS, SPI, LINSCI(TM)
April 2009 Rev 13 1/309
ST7MC1xx/ST7MC2xx8-bit MCU with nested interrupts, Flash, 10-bit ADC,
brushless motor control, five timers, SPI, LINSCI™
Features Memories– 8K to 60K dual voltage Flash Program memo-ry or ROM with read-out protection capability,In-application programming and In-circuit pro-gramming. 384 to 1.5K RAM HDFlash endurance: 100 cycles, data reten-tion: 40 years at 85°C
Clock, reset and supply management– Enhanced reset system Enhanced low voltage supervisor (LVD) formain supply and auxiliary voltage detector(AVD) with interrupt capability Clock sources: crystal/ceramic resonator os-cillators and by-pass for external clock, clocksecurity system. Four power saving modes: Halt, Active-halt,Wait and Slow
Interrupt management– Nested interrupt controller 14 interrupt vectors plus TRAP and RESET MCES top level interrupt pin 16 external interrupt lines (on 3 vectors)
Up to 60 I/O ports– up to 60 multifunctional bidirectional I/O lines up to 41 alternate function lines up to 12 high sink outputs
5 timers– Main clock controller with: Real-time base,Beep and clock-out capabilities Configurable window watchdog timer Two 16-bit timers with: 2 input captures, 2 out-put compares, external clock input, PWM andpulse generator modes– 8-bit PWM Auto-reload timer with: 2 input cap-tures, 4 PWM outputs, output compare andtime base interrupt, external clock with
event detector
2 Communication interfaces– SPI synchronous serial interface
–LINSCI™ asynchronous serial interface
Brushless motor control peripheral 6 high sink PWM output channels for sine-wave or trapezoidal inverter control Motor safety including asynchronous emer-gency stop and write-once registers4 analog inputs for rotor position detection(sensorless/hall/tacho/encoder) Permanent magnet motor coprocessor includ-ing multiplier, programmable filters, blankingwindows and event counters Operational amplifier and comparator for cur-rent/voltage mode regulation and limitation
Analog peripheral 10-bit ADC with 16 input pins
In-circuit Debug Instruction set– 8-bit data manipulation 63 basic instructions with illegal opcode de-tection 17 main Addressing modes 8 x 8 unsigned multiply instruction True bit manipulation
Development tools Full hardware/software development package
Table 1. Device summary
Note 1: For development only. No production
1 INTRODUCTIONThe ST7MCx device is member of the ST7 micro-
controller family designed for mid-range applica-
tions with a Motor Control dedicated peripheral.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with FLASH, ROM or
FASTROM program memory.
Under software control, all devices can be placed
in Wait, Slow, Active-halt or Halt mode, reducing
power consumption when the application is in idle
or stand-by state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
The devices feature an on-chip Debug Module
(DM) to support in-circuit debugging (ICD). For a
description of the DM registers, refer to the ST7
ICC Protocol Reference Manual.
Figure 1. Device Block Diagram