ST72T734J6B1 ,8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM,ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2CST72774/ST72754/ST727348-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM,2ADC, TIMER, SYNC, TM ..
ST72T751N9B1 ,8-BIT, 56-PIN MCU FOR MONITORS, WITH UP TO 60K ROM, 2K RAM, ADC, TIMER, IR, SYNC, PWM/BRM, DDC/DMA, I2C & SCIFeatures ST72751N9 ST72751N7 ST72751N6■ 8-bit Analog to Digital Converter with 8channels on port BR ..
ST72T752J6B1 ,8-BIT MCU FOR MONITORS WITH UP TO 32K ROM, 1K RAM, ADC, TIMER, SYNC, PWM/BRM, DDC/DMA & I2CRST727528-BIT MCU FOR MONITORS WITH UP TO 32K ROM, 1K RAM, ADC,2TIMER, SYNC, PWM/BRM, DDC/DMA & I C ..
ST72T754J9B1 ,8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM, ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2CST72774/ST72754/ST727348-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM,2ADC, TIMER, SYNC, TM ..
ST72T774J9B1 ,8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM,ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2CGeneral Description . 183.1.2 Crystal Resonator . . 193.1.3 External Clock . . ..
ST72T774S9T1 ,8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM,ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2CFunctional Description . . . . . . 1234.10.4Low Power Mode . 1244.10.5Interrupts ..
STR7102 , Separate Excitation Switching Type
STR7102 , Separate Excitation Switching Type
STR710FZ1H6 ,ARM-Based Flash microcontrollers with USB and CANAbsolute maximum ratings . . . . 354.3 Operating conditions 374.3.1 Supply current charac ..
STR710FZ2T6 ,STR71x: 144/64-pin ARM7TDMI MCU with up to 256KB FLASH, 64KB RAM and EMIfeatures including CAN, USB and External Memory Interface. The two 64-pin versions do notinclude Ex ..
STR710RZH6 ,ARM7TDMI-S™ 32-BIT MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CANFeatures■ Core– ARM7TDMI 32-bit RISC CPULQFP6410 x 10– 59 MIPS @ 66 MHz from SRAM LQFP14420 x 20– 4 ..
STR710RZT6 ,ARM7TDMI-S™ 32-BIT MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CANThermal characteristics . . . . 36Table 11. General operating conditions . . . . . . . 37 ..
ST72T734J6B1-ST72T774J9B1-ST72T774S9T1
8-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP, 1K RAM,ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C
October 2003 1/144
ST72774/ST72754/ST727348-BIT USB MCU FOR MONITORS, WITH UP TO 60K OTP , 1K RAM,
ADC, TIMER, SYNC, TMU, PWM/BRM, H/W DDC & I2C User ROM/OTP/EPROM: up to 60 Kbytes Data RAM: up to 1 Kbytes (256 bytes stack) 8 MHz Internal Clock Frequency in fast mode,
4 MHz in normal mode Run and Wait CPU modes System protection against illegal address jumps
and illegal opcode execution Sync Processor for Mode Recognition, power
management and composite video blanking,
clamping and free-running frequency
generation Corrector mode Analyzer mode USB (Universal Serial Bus) for monitor function 1 Three endpoints Integrated 3.3V voltage regulator Transceiver Suspend and Resume operations Timing Measurement Unit (TMU) for
autoposition and autosize 1 Fast I2 C Single Master Interface DDC Bus Interface with: DDC1/2B protocol implemented in hardware Programmable DDC CI modes Enhanced DDC (EDDC) address decoding 31 I/O lines
Device Summary(1) On some devices only, refer to Device Summary; (2) Contact Sales office for availability(3) 8-bit ±2 LSB A/D converter ; (4) 8-bit ±4 LSB A/D converter.
4.4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4.4.2 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
4.4.3 Input Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.4.4 Input Signal Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.4.5 Output Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
4.4.6 Input Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
4.4.7 Output Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
4.4.8 Analyzer Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
4.4.9 Corrector Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
4.4.10Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
4.5 TIMING MEASUREMENT UNIT (TMU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.5.2 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.5.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
4.5.4 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
4.6 USB INTERFACE (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.6.2 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.6.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
4.6.4 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
4.6.5 Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.7 I²C SINGLE MASTER BUS INTERFACE (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.7.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.7.2 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.7.3 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.7.4 Functional Description (Master Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.7.5 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.8 DDC INTERFACE (DDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.8.2 DDC Interface Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
4.8.3 Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.8.4 I2C BUS Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.8.5 DDC Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
4.8.6 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
4.9 PWM/BRM GENERATOR (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
4.9.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
4.9.2 Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
4.9.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
4.9.4 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
4.10 8-BIT A/D CONVERTER (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
4.10.1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
4.10.2Main Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
4.10.3Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
4.10.4Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
4.10.5Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
4.10.6Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
5 INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1265.1 ST7 ADDRESSING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.1.1 Inherent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.1.2 Immediate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.1.3 Direct . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.1.4 Indexed (No Offset, Short, Long) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.1.5 Indirect (Short, Long) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.1.6 Indirect Indexed (Short, Long) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
5.1.7 Relative mode (Direct, Indirect) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
5.2 INSTRUCTION GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
6 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1326.1 POWER CONSIDERATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
6.2 AC/DC ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
7 GENERAL INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1397.1 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
8 ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1418.1 TRANSFER OF CUSTOMER CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Revision follow-upChanges applied since version 4.0
Version 4.0 March 2001
Page 1:Addition of 72T774 (32KOTP).
Addition of 60K/48K ROM for ST72754
Deletion of table “ device summary”, replaced with cross reference to table 36 on page 147.
page 13 - addition of section 1.4. external connections
Version 4.1 July 2001
Initial format reapplied, text and related figures in the same page.
Table “Device summary” reinserted in cover page and updated.
Update of table 36: ordering information (p143)
Version 4.2 July 2001
Cover - addition of feature about system protection added,
table for device summary: addition of stack values
page 9 - figure 3: replaced 1KByte with 512 Bytes + notes about opcode fetch and HALT
mode
page 10 - table: CR replaced by WDGCR
TIM replaced with Timer and WDG replaced with Watchdog
page 115 - EDF register: addition of “read from RAM”, EDE: few changes
page 135 - Note 1 replaced, note 2 added SUSpend mode limitation..
Whole document: all mentions of HALT mode either deleted or rewritten.
Version 4.3 October 2001
p140, chapter 8, section 8.1-
code for unused bytes ( FFh) replaced with 9Dh (opcode for NOP)
page 141- update of table 36 “Ordering information”
page 142 - list of available devices updated
page 114 - DDC DCR register: bit 5 = 1, text “or read from RAM” deleted
Version 4.3 November 2001
page 10, one adddress corrected in the figure 3 “memory map”: 0400h
page 14: addition of mandatory 1K resistor (text and figure)
