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ST72251G2M3-ST72T251G1B6-ST72T251G1M6-ST72T251G2B6-ST72T251G2M6
8-BIT MCU WITH 4 TO 8K ROM/OTP/EPROM, 256 BYTES RAM, ADC, WGD, SPI, I2C AND 2 TIMERS
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ST72251
8-BIT MCU WITH 4 TO 8K ROM/OTP/EPROM,
256 BYTES RAM, ADC, WDG, SPI, IZC AND 2 TIMERS
User Program Memory (ROM/OTP/EPROM):
4 to 8K bytes
Data RAM: 256 bytes, including 64 bytes of
Master Reset and Power-On Reset
1: Run, Wait, Slow and Halt modes
I: 22 multifunctional bidirectional l/O lines:
- 22 programmable interrupt inputs
- 8 high sink outputs
- 6 Analog alternate inputs
- 16 Alternate Functions
- EMI filtering
Programmable watchdog (WDG)
1: Two 16-bit Timers, each featuring:
- 2 Input Captures
- 2 Output Compares
- External Clock input (on Timer A only)
- PWM and Pulse Generator modes
Synchronous Serial Peripheral Interface (SPI)
Full 12C multiple Master/Slave interface
8-bit Analog-to-Digital converter (6 channels)
8-bit Data Manipulation
63 Basic Instructions
17 main Addressing Modes
8 x 8 Unsigned Multiply Instruction
True Bit Manipulation
Complete Development Support on PC/DOS-
WINDOWSTM Real-Time Emulator
Full Software Package on DOS/WINDOWS"'
(C-Compiler, Cross-Assembler, Debugger)
June 2001
DATASHEET
PSDIP32
CSDIP32W
(See ordering information at the end of datasheet)
Device Summary
Features ST72251G1 ST72251G2
Program Memory
- bytes 4K 8K
RAM (stack) - bytes 256 (64)
Peripherals Watchdog, Timers, SPI, Pc, ADC
Operating Supply 3 to 5.5 V
CPU Frequency
8MHz max (16MHz oscillator)
4MHz max over 85°C
Temperature Range
- 40''C to + 125°C
Package
SO28 - SDIP32
Rev. 1.9
Table of Contents
ST72251 ........................................ . . . . 1
1 GENERAL DESCRIPTION M..................................................... 5
1.1 INTRODUCTION _........................................................ 5
1.2 PIN DESCRIPTION ....................................................... 6
1.3 EXTERNAL CONNECTIONS ................................................ 8
1.4 MEMORY MAP _......................................................... 9
2 CENTRAL PROCESSING UNIT ................................................. 12
2.1 INTRODUCTION _....................................................... 12
2.2 MAIN FEATURES _...................................................... 12
2.3 CPU REGISTERS _...................................................... 12
3 CLOCKS, RESET, INTERRUPTS & POWER SAVING MODES ........................ 15
3.1 CLOCK SYSTEM _....................................................... 15
3.1.1 General Description ................................................. 15
3.2 RESET B............................................................... 16
3.2.1 Introduction w...................................................... 16
3.2.2 External Reset ..................................................... 16
3.2.3 ResetOperation .................................................... 16
3.2.4 Power-on Reset _................................................... 16
4 INTERRUPTS M.............................................................. 17
4.1 NON MASKABLE SOFTWARE INTERRUPT .................................. 17
4.2 EXTERNAL INTERRUPTS ................................................ 17
4.3 PERIPHERAL INTERRUPTS ............................................... 17
4.4 POWER SAVING MODES ................................................. 20
4.4.1 Introduction _...................................................... 20
4.4.2 Slow Mode _....................................................... 20
4.4.3 WaitMode _....................................................... 20
4.4.4 HaItMode ......................................................... 21
4.5 MISCELLANEOUS REGISTER ............................................. 22
5 ON-CHIP PERIPHERALS ...................................................... 23
5.1 l/O PORTS _............................................................ 23
5.1.1 Introduction _...................................................... 23
5.1.2 Functional Description ............................................... 23
5.1.3 l/O Port Implementation .............................................. 24
5.1.4 Register Description ................................................. 27
5.2 WATCHDOG TIMER (WDG) ............................................... 29
5.2.1 Introduction _...................................................... 29
5.2.2 Main Features w.................................................... 29
5.2.3 Functional Description ............................................... 30
5.2.4 Low Power Modes w................................................. 30
5.2.5 Interrupts _........................................................ 30
5.2.6 Register Description ................................................. 30
5.3 16-BIT TIMER w......................................................... 31
5.3.1 Introduction _...................................................... 31
5.3.2 Main Features ..................................................... 31
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