ST4G3235BJR ,4-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTORAbsolute Maximum Ratings Symbol Parameter Value UnitV Output Supply Voltage-0.5 to +4.6 VCCAInpu ..
ST4G3235BJR ,4-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTORST4G32354-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATORWITH A SIDE SERIES RESISTORPRODUCT PREVIEW ..
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ST4G3235BJR
4-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
1/13February 2005 HIGH SPEED: tPD = 4.3ns (MAX.) at TA =85°C CCB = 1.65V; V CCA = 3.0V LOW POWER DISSIPATION: CCA = I CCB = 5µA(MAX.) at TA =85°C SYMMETRICAL OUTPUT IMPEDANCE: OHA | = I OLA = 10mA MIN at
VCCA = 2.75V; VCCB = 1.4V to 3.6V OHB | = I OLB = 4mA MIN at CCB = 1.65V; V CCA = 1.4 to 3.6V) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS 26Ω SERIES RESISTOR ON A SIDE OUTPUTS OPERATING VOLTAGE RANGE:
VCCA(OPR) = 1.4V to 3.6V (1.2V Data Retent)
VCCB(OPR) = 1.4V to 3.6V (1.2V Data Retent) LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17) ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V ROHS Compliant for FLIPCHIP Package
DESCRIPTIONThe ST4G3235 is a dual supply low voltage
CMOS 4-BIT BUS BUFFER level translator
fabricated with sub-micron silicon gate and
five-layer metal wiring C2 MOS technology.
Designed for use as an interface between a 3.3V
bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V,
3.3V/2.5V, 1.8V/1.4V and 2.5V/1.8V supply
systems, it achieves high speed operation while
maintaining the CMOS low power dissipation.
This IC is intended for one-way asynchronous
communication between data buses. The input
and output power down protections disable the
device when both power supply are down, so that
the buses are effectively isolated.
The input tolerant buffers allow to translate V CCBcompatible signals and greater signals than VCCB
up/down to VCCA and viceversa.
All inputs are equipped with protection circuits
against static discharge, giving them ESD immuni-
ty and transient excess voltage.
ST4G32354-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR
WITH A SIDE SERIES RESISTOR
Table 1: Order Codes
PRODUCT PREVIEW
Figure 1: Logic DiagramRev. 4
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Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
Figure 3: Pin Connection (top through view)
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Table 3: Truth Table n = 1..2
n = 3..4
Table 4: Absolute Maximum Ratings Absolute Maximum Ratings are those value beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions 1) VI from 0.8V to 2.0V at VCC = 3.0V
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Table 6: DC Specification for V CCA (*) VCC range = 3.3±0.3; 2.5±0.2V; 1.8±0.15V
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Table 7: DC Specification for V CCB (*) VCC range = 3.3±0.3; 2.5±0.2V; 1.8±0.15V
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Table 8: Dynamic Switching Characteristics
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Table 9: AC Electrical Characteristics 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|
2) Parameter guaranteed by design
