SNJ54AHC138FK ,3-Line To 8-Line Decoders/DemultiplexersSN54AHC138, SN74AHC1383-LINE TO 8-LINE DECODERS/DEMULTIPLEXERSSCLS258L − DECEMBER 1995 − REVISED JU ..
SNJ54AHC373W ,Octal-Transparent D-type Latches With 3-State Outputs SN54AHC373, SN74AHC373 OCTAL TRANSPARENT D-TYPE LATCHESWITH 3-STATE OUTPUTSSCLS235I – OCTOBER 1995 ..
SNJ54AHC541W ,Octal Buffers/Drivers With 3-State OutputsElectrical Characteristics....... 512 Device and Documentation Support........ 126.6 Switching Char ..
SNJ54AHCT04J ,Hex InvertersFeatures 3 DescriptionThe SNx4AHCT04 devices contain six independent1• Inputs are TTL-Voltage Compa ..
SNJ54AHCT08FK ,Quadruple 2-Input Positive-AND GatesFeatures 3 DescriptionThe SNx4AHCT08 devices are quadruple 2-input1• Inputs are TTL-Voltage Compati ..
SNJ54AHCT125J ,Quadruple Bus Buffer Gates With 3- State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SPX29302T5-L , 3A Guaranteed Output Current
SPX2940T-2.5 , 1A Low Dropout Voltage Regulator Fixed Output, Fast Response
SPX2940T-5.0 , 1A Low Dropout Voltage Regulator Fixed Output, Fast Response
SPX2941U5 , 1A Low Dropout Voltage Regulator, Adjustable Output, Fast Response
SPX29500U-3.3 , 5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response Time
SPX29503T5 , 5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response Time
SNJ54AHC138FK
3-Line To 8-Line Decoders/Demultiplexers
SN54AHC138, SN74AHC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS258L − DECEMBER 1995 − REVISED JULY 2003
Operating Range 2-V to 5.5-V VCC Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems Incorporate Three Enable Inputs to Simplify
Cascading and/or Data Reception Latch-Up Performance Exceeds 250 mA Per
JESD 17 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)12019
91011 1213
G2A
G2BANCY5Y0
GND
SN54AHC138 ...FK PACKAGE
(TOP VIEW)NC − No internal connection
G2A
G2B
GND
VCC
SN54AHC138 ...J OR W PACKAGE
SN74AHC138 ...D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
SN74AHC138... RGY PACKAGE
(TOP VIEW)G2A
G2B
GND
description/ordering informationThe ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing
applications that require very short propagation-delay times. In high-performance memory systems, these
decoders can be used to minimize the effects of system decoding. When employed with high-speed memories
utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are
less than the typical access time of the memory. This means that the effective system delay introduced by the
decoders is negligible.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
