SNJ54AC574J ,Octal D-type Edge-Triggered Flip-Flops with 3-State OutputsSN54AC574, SN74AC574OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPSWITH 3-STATE OUTPUTSSCAS541E − OCTOBER 19 ..
SNJ54AC74W ,Dual Positive-Edge-Triggered D-Type- Flip-Flops With Clear And Preset SCAS521F − AUGUST ..
SNJ54ACT08FK ,Quadruple 2-Input Positive-AND Gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SNJ54ACT08J ,Quadruple 2-Input Positive-AND Gatesmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SNJ54ACT14J ,Hex Schmitt-trigger Invertersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SNJ54ACT240W ,Octal Buffers/Drivers With 3-State OutputsSN54ACT240, SN74ACT240OCTAL BUFFERS/DRIVERSWITH 3-STATE OUTPUTSSCAS515C − JUNE 1995 − REVISED OCTOB ..
SPX29152U5 , 1.5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response Time
SPX29153T5 , 1.5A Low Dropout Voltage Regulator Adjustable & Fixed Output, Fast Response Time
SPX2920M3-3.3 , 400mA Low Drop Out Voltage Regulator with Shutdown
SPX2920U-5.0 , 400mA Low Drop Out Voltage Regulator with Shutdown
SPX29302T5-L , 3A Guaranteed Output Current
SPX2940T-2.5 , 1A Low Dropout Voltage Regulator Fixed Output, Fast Response
SNJ54AC574J
Octal D-type Edge-Triggered Flip-Flops with 3-State Outputs
GND
VCC
CLK
SN54AC574 ...J OR W PACKAGE
SN74AC574... DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)21 2019
9101112131DOE7Q
GND
CLK
SN54AC574... FK PACKAGE
(TOP VIEW)SN54AC574, SN74AC574
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCAS541E − OCTOBER 1995 − REVISED OCTOBER 2003
2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V Max tpd of 8.5 ns at 5 V 3-State Outputs Drive Bus Lines Directly
description/ordering informationThese 8-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. The devices
are particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight flip-flops of the ′AC574 devices are
D-type edge-triggered flip-flops. On the positive
transition of the clock (CLK) input, the Q outputs
are set to the logic levels set up at the data (D)
inputs.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal
logic state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
the increased drive provide the capability to drive
bus lines in a bus-organized system without need
for interface or pullup components.
OE does not affect internal operations of the
flip-flop. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
