SN75LVDS86DGGR ,FlatLink(TM) Receivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN75LVDS9637D ,HIGH-SPEED DIFFERENTIAL LINE RECEIVERSlogic diagram (positive logic)(positive logic)8421AG1Y12 7G 1B623 31A2A2Y1Y511B 2B652A2Y72B103A 113 ..
SN75LVDS9637DR ,High-Speed Differential Line Receivers 8-SOIC 0 to 70maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN75LVDS9637DRG4 ,High-Speed Differential Line Receivers 8-SOIC 0 to 70SN75LVDS32, SN75LVDS9637HIGH-SPEED DIFFERENTIAL LINE RECEIVERSSLLS360B – JUNE 1999 – REVISED JUNE 2 ..
SN75LVDS9638DGK ,High-Speed Differential Line Drivers 8-VSSOP 0 to 70electrical characteristics of low-voltage differential2A 3 6 2Ysignaling (LVDS). This signaling tec ..
SN75LVDT386DGG ,16-Channel LVDS Receiver SLLS394I–SEPTEMBER 1999–REVISED DECEMBER 20145 Description (Continued)Any of the differential rece ..
SPN8822ATS8RG , Common-Drain Dual N-Channel Enhancement Mode MOSFET
SPN8822ATS8RG , Common-Drain Dual N-Channel Enhancement Mode MOSFET
SPP02N60S5 ,for lowest Conduction LossesFeatureR 3 ΩDS(on)• New revolutionary high voltage technologyI 1.8 AD• Ultra low gate chargeP-TO263 ..
SPP02N80C3 ,for lowest Conduction Losses & fastest SwitchingPlease note: Infineon has changed the CoolMOS 800V C2 marking to C3. 800V C2 ...CharacteristicsParameter Symbol Conditions Values Unitmin. typ. max.V V =0V, I =0.25mA 800 - - VDra ..
SPP02N80C3 ,for lowest Conduction Losses & fastest SwitchingPlease note: Infineon has changed the CoolMOS 800V C2 marking to C3. 800V C2 ...FeatureR 2.7 ΩDS(on)• New revolutionary high voltage technologyI 2 AD• Ultra low gate chargeP-TO220 ..
SPP03N60C3 ,for lowest Conduction Losses & fastest SwitchingCharacteristics, at T =25°C unless otherwise specifiedjParameter Symbol Conditions Values Unitmin. ..
SN75LVDS86-SN75LVDS86DGG-SN75LVDS86DGGR
FlatLink(TM) Receiver
Three Data Channels and ClockLow-Voltage Differential Channels In and
21 Data and Clock Low-Voltage TTL
Channels Out Operates From a Single 3.3-V Supply and
250 mW (Typ) 5-V Tolerant SHTDN Input ESD Protection Exceeds 4 kV on Bus Pins Packaged in Thin Shrink Small-Outline
Package (TSSOP) With 20-Mil Terminal
Pitch Consumes Less Than 1 mW When Disabled Wide Phase-Lock Input Frequency Range
31 MHz to 68 MHz No External Components Required for PLL Open-Circuit Receiver Fail-Safe Design Inputs Meet or Exceed the Requirements of
ANSI EIA/TIA-644 Standard Improved Replacement for the National�
DS90C562
descriptionThe SN75LVDS86 FlatLink receiver contains three serial-in 7-bit parallel-out shift registers, a 7× clock
synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These
functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, ’83, ’84,
or ’85, over four balanced-pair conductors, and expansion to 21 bits of single-ended low-voltage TTL (LVTTL)
synchronous data at a lower transfer rate.
When receiving, the high-speed LVDS data is received and loaded into registers at seven times (7×) the LVDS
input clock (CLKIN) rate. The data is then unloaded to a 21-bit-wide LVTTL parallel bus at the CLKIN rate. A
phase-locked loop (PLL) clock synthesizer circuit generates a 7× clock for internal clocking and an output clock
for the expanded data. The SN75LVDS86 presents valid data on the falling edge of the output clock (CLKOUT).
The SN75LVDS86 requires only four line-termination resistors for the differential inputs and little or no control.
The data bus appears the same at the input to the transmitter and output of the receiver with the data
transmission transparent to the user. The only possible user intervention is the use of the shutdown/clear
(SHTDN) active-low input to inhibit the clock and shut off the LVDS receivers for lower power consumption. A
low level on this signal clears all internal registers to a low level.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FlatLink is a trademark of Texas Instruments.
D19
D20
LVDSGND
A0M
A0P
A1M
A1P
LVDSVCC
LVDSGND
A2M
A2P
CLKINM
CLKINP
LVDSGND
PLLGND
PLLVCC
PLLGND
SHTDN
CLKOUT
D14
GND
D13CC
D12
D11
D10
GND
VCC
GND
VCC
GND
NC − Not Connected
