SN75LVDS83BDGGR ,10-135 MHz 28-bit FlatLink? LVDS Transmitter/Serializer 56-TSSOP -10 to 70Thermal Characteristics table..... 10• Changed G7(LSB) to G7(MSB) in Figure 15... 21• Added Note C ..
SN75LVDS83BZQLR ,10-135 MHz 28-bit FlatLink? LVDS Transmitter/Serializer 56-BGA MICROSTAR JUNIOR -10 to 70Electrical Characteristics....... 713.1 Trademarks..... 327.7 Timing Requirements... 813.2 Electros ..
SN75LVDS83DGG ,FlatLink(TM) Transmittermaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage range, V ..
SN75LVDS83DGGG4 ,FlatLink(TM) Transmitter 56-TSSOP 0 to 70maximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage range, V ..
SN75LVDS83DGGR ,FlatLink(TM) Transmitterblock diagramParallel-Load 7-BitShift Register7Y0PD0, D1, D2, D3,A,B, ...GD4, D6, D7Y0MSHIFT/LOADCL ..
SN75LVDS83DGGRG4 ,FlatLink(TM) Transmitter 56-TSSOP 0 to 70Not Recommended for New Designs SLLS271I − MARCH 1997 − REVISED MAY 200 ..
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SN75LVDS83BDGG-SN75LVDS83BDGGR-SN75LVDS83BZQLR
FlatLink 10-135MHz Transmitter
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SN75LVDS83BSLLS846C –MAY 2009–REVISED AUGUST 2014
SN75LVDS83B FlatLink™ Transmitter Features 2 Applications LVDS Display Series Interfaces Directlyto LCD • LCD Display Panel Driver
Display Panels With Integrated LVDS • UMPC and Netbook PC Package Options: 4.5-mmx 7-mm BGA, and 8.1- • Digital Picture Framex 14-mm TSSOP
Description• 1.8-V Upto 3.3-V Tolerant Data Inputsto Connect
Directlyto Low-Power, Low-Voltage Application The SN75LVDS83B FlatLink™ transmitter contains
and Graphic Processors four 7-bit parallel-load serial-out shift registers,a 7X
clock synthesizer, and five Low-Voltage Differential• Transfer Rateupto 135 Mpps (Mega Pixel Per Signaling (LVDS) line driversina single integratedSecond); Pixel Clock Frequency Range10 MHzto circuit. These functions allow 28 bitsof single-ended135 MHz LVTTL datatobe synchronously transmitted over five• Suitedfor Display Resolutions Ranging From balanced-pair conductors for receiptbya compatibleHVGAupto HD With Low EMI receiver, suchas the SN75LVDS82 and LCD panels
with integrated LVDS receiver.• Operates Froma Single 3.3-V Supply and 170 (Typ.)at75 MHz When transmitting, data bits D0 through D27 are 28 Data Channels Plus Clockin Low-Voltage TTL each loaded into registers upon the edgeof the input
clock signal (CLKIN). The risingor falling edgeof theto4 Data Channels Plus Clock Out Low-Voltage
clock can be selected via the clock select (CLKSEL)Differential pin. The frequency of CLKINis multiplied seven• Consumes Less Than1 mW When Disabled times, and then usedto unload the data registersin• Selectable Risingor Falling Clock Edge Triggered 7-bit slices and serially. The four serial streams anda
Inputs phase-locked clock (CLKOUT) are then output to
LVDS output drivers. The frequencyof CLKOUTis• ESD: 5-kV HBM the sameas the input clock, CLKIN.• Support Spread Spectrum Clocking (SSC) Compatible withall OMAP™ 2x, OMAP™ 3x, and
Device Information(1)DaVinci™ Application Processors
(1) Forall available packages, see the orderable addendumat
the endofthe datasheet.
