SN74SSTVF16857 ,14-Bit Registered Buffer With SSTL_2 Inputs and Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74SSTVF16857GR ,14-Bit Registered Buffer With SSTL_2 Inputs and Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74SSTVF16859 ,13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74SSTVF16859GR ,13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputslogic diagram (positive logic)51RESET48CLK49CLK45VREFOne of 13 Channels35D1 16Q1A1DC132RQ1BTo 12 Ot ..
SN74SSTVF16859GRG4 ,13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70maximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74SSTVF16859S8 ,13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SPA20N65C3 ,for lowest Conduction Losses & fastest SwitchingCharacteristics, at T =25°C unless otherwise specifiedjParameter Symbol Conditions Values Unitmin. ..
SPA21N50C3 ,for lowest Conduction Losses & fastest SwitchingCharacteristicsParameter Symbol Values Unitmin. typ. max.R - - 0.6 K/WThermal resistance, junction ..
SPB02N60C3 ,for lowest Conduction Losses & fastest SwitchingFeatureR 3 ΩDS(on)• New revolutionary high voltage technologyI 1.8 AD• Ultra low gate chargeP-TO263 ..
SPB02N60S5 ,for lowest Conduction LossesCharacteristics, at Tj=25°C unless otherwise specifiedParameter Symbol Conditions Values Unitmin. t ..
SPB03N60C3 ,for lowest Conduction Losses & fastest SwitchingCharacteristicsParameter Symbol Conditions Values Unitmin. typ. max.Transconductance g V ≥2*I *R , ..
SPB03N60S5 ,for lowest Conduction LossesCharacteristics, at Tj=25°C unless otherwise specifiedParameter Symbol Conditions Values Unitmin. t ..
SN74SSTVF16857-SN74SSTVF16857GR
14-Bit Registered Buffer With SSTL_2 Inputs and Outputs
Pinout and Functionality Compatible WithJEDEC Standard SSTV16857 600 ps Faster (Simultaneous Switching)
Than JEDEC Standard SSTV16857 in
PC2700 DIMM Applications Output Edge-Control Circuitry Minimizes
Switching Noise in Unterminated DIMM
Load Outputs Meet SSTL_2 Class I
Specifications Supports SSTL_2 Data Inputs Differential Clock (CLK and CLK) Inputs Supports LVCMOS Switching Levels on the
RESET Input RESET Input Disables Differential Input
Receivers, Resets All Registers, and
Forces All Outputs Low Flow-Through Architecture Optimizes PCB
Layout Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
description/ordering informationThis 14-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation.
All inputs are SSTL_2, except the LVCMOS reset (RESET) input. All outputs are edge-controlled circuits
optimized for unterminated DIMM loads and meet SSTL_2 Class I specifications.
The SN74SSTVF16857 operates from a differential clock (CLK and CLK). Data are registered at the crossing
of CLK going high and CLK going low.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
VDDQ
GND
VDDQ
VDDQ
GND
VDDQ
GND
Q10
Q11
Q12
VDDQ
GND
Q13
Q14
VCC
CLK
CLK
VCC
GND
VREF
RESET
D10
D11
D12
VCC
GND
D13
D14
