SN74LVU04APWR ,Hex Inverters SCES130L − MARCH 1998 − REVISED DECEMBER 2004 2-V to 5.5-V V Operat ..
SN74S00 ,Quad 2-input positive-NAND gates SDLS025D–DECEMBER 1983–REVISED MAY 20175 Pin Configuration and FunctionsSN5400 J, SN54xx00 J and W ..
SN74S00N ,Quad 2-input positive-NAND gatesPin Functions (continued)PINI/O DESCRIPTIONCDIP, CFP, SOIC, SO CFPNAME LCCCPDIP, SO, SSOP (SN74xx00 ..
SN74S00NSR , QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SN74S00NSR , QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SN74S02D ,Quad 2-input positive-NOR gates
SP813LCN , Low Power Microprocessor Supervisory Circuits
SP813LCN , Low Power Microprocessor Supervisory Circuits
SP813LCN , Low Power Microprocessor Supervisory Circuits
SP813LCN , Low Power Microprocessor Supervisory Circuits
SP813LCP , Low Power Microprocessor Supervisory Circuits
SP813LCP , Low Power Microprocessor Supervisory Circuits
SN74LVU04A-SN74LVU04AD-SN74LVU04ADR-SN74LVU04ADRG4-SN74LVU04ANSR-SN74LVU04APW-SN74LVU04APWR
Hex Inverters
<0.8 V at VCC = 3.3 V, TA = 25°C Typical V OHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)GND
VCC
SN54LVU04A ...J OR W PACKAGE
SN74LVU04A... D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)1ANC4A6A
GND
SN54LVU04A... FK PACKAGE
(TOP VIEW)NC − No internal connection
SN74LVU04A... RGY PACKAGE
(TOP VIEW)GND
description/ordering informationThese hex inverters are designed for 2-V to 5.5-V VCC operation.
The ’LVU04A devices contain six independent inverters with unbuffered outputs. These devices perform the
Boolean function Y = A.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
