SN74LVC3G14DCTRE4 ,Triple Schmitt-Trigger Inverter 8-SM8 -40 to 125 SCES367J–AUGUST 2001–REVISED NOVEMBER 2013(1)Recommended Operating ConditionsMIN MAX UNITOperating ..
SN74LVC3G14DCUR ,Triple Schmitt-Trigger InverterMaximum Ratingsover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74LVC3G14DCURG4 ,Triple Schmitt-Trigger Inverter 8-VSSOP -40 to 125SN74LVC3G14
SN74LVC3G14YZAR , TRIPLE SCHMITT TRIGGER INVERTER
SN74LVC3G17DCTRG4 ,TRIPLE SCHMITT-TRIGGER BUFFER 8-SM8 -40 to 125Features 3 DescriptionThis triple Schmitt-trigger buffer is designed for1• Available in the Texas I ..
SN74LVC3G17DCUR ,TRIPLE SCHMITT-TRIGGER BUFFERMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SP6201ER-L-1-8 , 100mA/200mA Micropower CMOS LDO Regulators
SP6203EM5-3.3 , Low Noise, 300mA and 500mA CMOS LDO Regulators
SP6203ER , Low Noise, 300mA and 500mA CMOS LDO Regulators
SP6205EM5-ADJ , Low Noise, 300mA and 500mA CMOS LDO Regulators
SP6205ER , Low Noise, 300mA and 500mA CMOS LDO Regulators
SP6213EC5-2.5 , Micropower, SC-70, 100mA CMOS LDO Regulator
SN74LVC3G14DCTR-SN74LVC3G14DCTRE4-SN74LVC3G14DCUR-SN74LVC3G14DCURG4
Triple Schmitt-Trigger Inverter
DCT PACKAGE
(TOP VIEW)
DCU PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW) VCC81A 73Y 1Y 62A 3A 5 2Y
GND 54 2Y6 3A2A7 1Y3Y VCC11A
SN74LVC3G14This triple Schmitt-trigger inverteris designed for
Availablein the Texas Instruments NanoFree™ 1.65-Vto 5.5-V VCC operation.
PackageThe SN74LVC3G14 contains three inverters and
• Supports 5-V VCC Operation performs the Boolean functionY= A. The device
• Inputs Accept Voltagesto 5.5V functionsas three independent inverters but, because
• Max tpdof 5.4 nsat 3.3V of Schmitt action,it may have different input threshold
levels for positive-going (VT+) and negative-going
• Low Power Consumption, 10-μA Max ICC(VT–) signals.
• ±24-mA Output Driveat 3.3V technology is a major
• Typical VOLP (Output Ground Bounce) concepts, using the die
VCC= 3.3V, TA= 25°C• Typical VOHV (Output VOH Undershoot) specified for partial-power-down
VCC= 3.3V, TA= 25°C The Ioff circuitry disables the
• Ioff Feature Supports Live Insertion, Partial- damaging current backflow
Power-Down Mode and Back Drive Protectionitis powered down.
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
