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SN74LVC3G04DCTR-SN74LVC3G04DCUR-SN74LVC3G04DCURG4-SN74LVC3G04YZPR
Triple Inverter Gate
311A VCCGND
DCT PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOMVIEW)
DCU PACKAGE
(TOP VIEW) VCC
GND
VCC 3A4 6
SN74LVC3G04
www.ti.com SCES363L –AUGUST 2001–REVISED NOVEMBER 2013
Triple Inverter Gate
Checkfor Samples: SN74LVC3G04
1FEATURES DESCRIPTIONThis triple inverteris designedfor 1.65-Vto 5.5-V VCC
Availablein the Texas Instruments NanoFree™ operation. The SN74LVC3G04 device performs the
Package Boolean functionY=A.
• Supports 5-V VCC Operation NanoFree™ package technology is a major
• Inputs Accept Voltagesto 5.5V breakthroughinIC packaging concepts, using the die
• Max tpdof 4.1 nsat 3.3V as the package.
Low Power Consumption, 10-µA Max ICC This deviceis fully specified for partial-power-down
• ±24-mA Output Driveat 3.3V applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow
• Typical VOLP (Output Ground Bounce) through the device whenitis powered down.
<0.8Vat VCC= 3.3V,TA= 25°C Typical VOHV (Output VOH Undershoot)Vat VCC= 3.3V,TA= 25°C Ioff Supports Live Insertion, Partial-Power-
Down Mode, and Back-Drive Protection Can Be Usedasa Down Translatorto
Translate Inputs Froma Maxof 5.5V Downto
the VCC Level Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
