SN74LVC2G08DCURG4 ,Dual 2-Input Positive-AND Gate 8-VSSOP -40 to 125Electrical Characteristics....... 612.1 Community Resources...... 126.6 Switching Characteristics.. ..
SN74LVC2G08YZPR ,Dual 2-Input Positive-AND GateLogic Diagram (Positive Logic)– 2000-V Human Body Model (A114-A)11A7– 1000-V Charged-Device Model ( ..
SN74LVC2G125DCTR ,Dual Bus Buffer Gate with 3-State Outputsfeatures dual line drivers with 3-state– 1000-V Charged-Device Modeloutputs. The outputs are disabl ..
SN74LVC2G125DCUR ,Dual Bus Buffer Gate with 3-State OutputsMaximum Ratings . 511 Layout.... 136.2 ESD Ratings........ 511.1 Layout Guidelines.... 136.3 Recomm ..
SN74LVC2G125YZPR ,Dual Bus Buffer Gate with 3-State OutputsSupport &Product Order Tools &TechnicalCommunityFolder Now Documents SoftwareSN74LVC2G125SCES204Q–A ..
SN74LVC2G126DCTR ,Dual Bus Buffer Gate With 3-State OutputsFeatures 2 Applications1• Available in the Texas Instruments NanoFree™ • Cable Modem Termination Sy ..
SP5658 , 2.7GHz 3-Wire Bus Controlled Frequency Synthesiser
SP5658 , 2.7GHz 3-Wire Bus Controlled Frequency Synthesiser
SP5658F/KG/MP1S , 2.7GHz 3-Wire Bus Controlled Frequency Synthesiser
SP5658FKGMP1S , 2.7GHz 3-Wire Bus Controlled Frequency Synthesiser
SP5658FKGMP1T , 2.7GHz 3-Wire Bus Controlled Frequency Synthesiser
SP5658SKGMP2S , 2.7GHz 3-Wire Bus Controlled Frequency Synthesiser
SN74LVC2G08DCTR-SN74LVC2G08DCUR-SN74LVC2G08DCURG4-SN74LVC2G08YZPR
Dual 2-Input Positive-AND Gate
71A 1Y 32A 2Y=Ax B orY=A + BProduct
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
SN74LVC2G08SCES198N –APRIL 1999–REVISED DECEMBER 2015
SN74LVC2G08 Dual 2-Input Positive-AND Gate Features 3 DescriptionThis dual 2-input positive-AND gateis designed for Availablein the Texas Instruments 1.65-Vto 5.5-V VCC operation.NanoStar™ and NanoFree™ Package
The SN74LVC2G08 device performs the Boolean• Supports 5-V VCC Operation
function in positive logic.• Inputs Accept Voltagesto 5.5V
NanoFree package technology is a major• Maxtpdof 4.7nsat 3.3V breakthroughinIC packaging concepts, using the die• Low Power Consumption, 10-μA Maximum ICC as the package.• ±24-mA Output Driveat 3.3V This deviceis fully specified for partial-power-down• Typical VOLP (Output Ground Bounce) applications using Ioff. The Ioff circuitry disables the<0.8Vat VCC= 3.3V,TA= 25°C outputs, preventing damaging current backflow• Typical VOHV (Output VOH Undershoot) through the device whenitis powered down.Vat VCC= 3.3V,TA= 25°C
Device Information(1)• Ioff Supports Live Insertion, Partial-Power-DownMode, and Back-Drive Protection• Can Be Usedasa Down Translatorto TranslateInputs Froma Maximumof 5.5V Downto the VCCLevel Latch-Up Performance Exceeds 100 mA Per (1) Forall available packages, see the orderable addendumat
the endofthe data sheet.JESD 78, ClassII ESD Protection Exceeds JESD22
Logic Diagram (Positive Logic)– 2000-V Human Body Model (A114-A) 1000-V Charged-Device Model (C101)
Applications IP Phones: Wired and Wireless Optical Networking: EPON and Video Over Fiber Point-to-Point Microwave Backhaul Power: Telecom DC/DC Module: Analog Power: Telecom DC/DC Module: Digital Private Branch Exchange (PBX) Telecom Shelter: Power Distribution Unit (PDU) Vector Signal Analyzers and Generators Wireless Communications Testers
