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SN74LVC1T45DBVR-SN74LVC1T45DBVRG4-SN74LVC1T45DBVT-SN74LVC1T45DCKR-SN74LVC1T45DCKRG4-SN74LVC1T45DRLR-SN74LVC1T45YZPR
Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs
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SN74LVC1T45SCES515L –DECEMBER 2003–REVISED FEBRUARY 2017
SN74LVC1T45 Single-Bit Dual-Supply Bus Transceiver With Configurable Voltage
Translation and 3-State Outputs Features ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101) Availablein the Texas Instruments NanoFree™
Package Fully Configurable Dual-Rail Design Allows Each
Portto Operate Over the Full 1.65-Vto 5.5-V
Power-Supply Range VCC Isolation Feature–If Either VCC InputIsat
GND, Both Ports Arein the High-Impedance State DIR Input Circuit Referencedto VCCA Low Power Consumption, 4-µA Max ICC ±24-mA Output Driveat 3.3V Ioff Supports Partial-Power-Down Mode Operation Max Data Rates 420 Mbps (3.3-Vto 5-V Translation) 210 Mbps (Translateto 3.3V) 140 Mbps (Translateto 2.5V) 75 Mbps (Translateto 1.8V) Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII
Applications Personal Electronic Industrial Enterprise Telecom
DescriptionThis single-bit noninverting bus transceiver uses two
separate configurable power-supply rails. TheA port designedto track VCCA. VCCA accepts any supply
voltage from 1.65Vto 5.5V. TheB portis designed track VCCB. VCCB accepts any supply voltage from
1.65Vto 5.5V. This allows for universal low-voltage
bidirectional translation between any of the 1.8-V,
2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC1T45is designed for asynchronous
communication between two data buses. The logic
levels of the direction-control (DIR) input activate
either the B-port outputsor the A-port outputs. The
device transmits data from theA busto theB bus
when the B-port outputs are activated and from theB
bus to theA bus when the A-port outputs are
activated. The input circuitryis always active on both andB ports and must havea logic HIGHor LOW
level appliedto prevent excess ICC and ICCZ.
Device Information(1)(1) Forall available packages, see the orderable addendumat
the endofthe datasheet.
Functional Block Diagram
