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SN74LVC1G99DCUR-SN74LVC1G99YZPR
Ultra-Configurable Multi-Function Gate With 3-State Outputs
DCT PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW) VCC8 7 Y 6 DBGND 4 C 7 YA
GND 54 C6 DB7 YA VCC1OE
SN74LVC1G99The SN74LVC1G99 deviceis operational from 1.65V
Availablein Texas Instruments to 5.5V.
NanoFree™ PackageThe SN74LVC1G99 device features configurable
• Supports 5-V VCC Operation multiple functions witha 3-state output. The outputis
• Inputs Accept Voltagesto 5.5V disabled when the output-enable (OE) inputis high.
• Supports Down Translationto VCC When OEis low, the output stateis determinedby16
patternsof 4-bit input. The user can choose logic
• Max tpdof 6.7 nsat 3.3Vfunctions, such as MUX, AND, OR, NAND, NOR,
• Low Power Consumption, 10-µA Max ICC XOR, XNOR, inverter, and buffer. All inputs can be
• ±24-mA Output Driveat 3.3V Offers Nine Different Logic Functions asan independent inverter, but
Single Package action,it has different input
• Ioff Supports Live Insertion, Partial-Power- (VT+) and negative-
Down Mode, and Back-Drive Protection Input Hysteresis Allows for Slow Input state during power up
Transition Time and Better Noise Immunityat or power down, OE should be tiedto VCC througha
Input pullup resistor; the minimum valueof the resistoris
determined by the current-sinking capability of the
• Latch-Up Performance Exceeds 100 mA Per driver.
JESD 78, ClassIIThis deviceis fully specified for partial-power-down
• ESD Protection Exceeds JESD22applications using Ioff. The Ioff circuitry disables the
– 2000-V Human-Body Model (A114-A) outputs, preventing damaging current backflow
– 200-V Machine Model (A115-A) through the device whenitis powered down.
1000-V Charged-Device Model (C101) technologies are a major concepts, using the die