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SN74LVC1G3208DBVRTIN/a376avaiSingle 3-Input Positive OR-AND Gate


SN74LVC1G3208DBVR ,Single 3-Input Positive OR-AND GateFEATURES DESCRIPTIONThis device is designed for 1.65-V to 5.5-V VCC2• Available in the Texas Instru ..
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SN74LVC1G3208DBVR
SINGLE 3-INPUT POSITIVE OR-AND GATE
1AGND
DBV PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
1
GND
See mechanical drawings for dimensions. VCC
SN74LVC1G3208
www.ti.com
SCES605B –SEPTEMBER 2004–REVISED DECEMBER 2013
Single 3-Input Positive OR-AND Gate
Checkfor Samples: SN74LVC1G3208
1FEATURES DESCRIPTION
for 1.65-V to 5.5-V VCC Availablein the Texas Instruments NanoStar™and NanoFree™ Packages isa single 3-input• Supports 5-V VCC OperationIt performs the Boolean• Inputs Accept Voltagesto 5.5V positive logic.• Provides Down Translationto VCC to GND or VCC, the• Max tpdof5nsat 3.3V offers two more functions.• Low Power Consumption, 10-µA Max device performs asa2- WhenAis tiedto GND,• ±24-mA Output Driveat 3.3V AND gate(Y=B● C).• Input Hysteresis Allows Slow Input Transitiona 2-input AND gate whenand Better Switching Noise Immunity Bis tiedto GND(Y=A● C).Input (Vhys= 250 mV Typ@ 3.3V)
NanoStar™ and NanoFree™ package technologyis• Can Be Usedin Three Combinations: a major breakthrough in IC packaging concepts,– OR-AND Gate using the dieas the package. OR Gate This deviceis fully specified for partial-power-down– AND Gate applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow• Ioff Supports Live Insertion, Partial-Power-
through the device whenitis powered down.Down Mode, and Back-Drive Protection Latch-Up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model 200-V Machine Model (A115-A) 1000-V Charged-Device Model
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