SN74LVC16374DGGR ,16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputsmaximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functi ..
SN74LVC16374DGGR ,16-Bit Edge-Triggered D-Type Flip-Flop With 3-State OutputsFEATURESDGG OR DL PACKAGE• Member of the Texas Instruments Widebus™(TOP VIEW)Family1 48• EPIC™ (Enh ..
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SN74LVC16374DGGR-SN74LVC16374DL-SN74LVC16374DLR
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs
DESCRIPTION
DGG OR DL PACKAGE
(TOP VIEW)1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK buffered (OE) input canbe usedto place the eight outputsin eithera normal logic state (highor
SN74LVC16374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP Member the Texas Instruments Widebus™
Family EPIC™ Implanted
CMOS) Process Typical (Output Ground Bounce) 0.8V VCC= 3.3V,TA= 25°C Typical OHV (OutputVOH Undershoot)2VatCC= 3.3V,TA= 25°C Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17 Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors Package Include Plastic 300-mil
Shrink (DL) and Thin Shrink
Small-Outline (DGG) PackagesThis 16-bit D-type flip-flopis designed
for 2.7-VtoVCC operation.
The SN74LVC16374 is particularly suitable for
implementing buffer registers, I/O ports, bidirectional
bus drivers, working registers.It can be usedas
two 8-bit or one 16-bit flip-flop. On the
positive transitionof the clock (CLK) input, theQ
outputsof flip-flop take on the logic levels set up the data inputs.
low logic levels)ora high-impedance state.In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capabilityto drive bus lines
without need interfaceor pullup components. does not internal operationsof the flip-flop. data canbe retainedor new data canbe entered while
the outputsin the high-impedance state. ensure high-impedance state during power up down, OE should be tiedtoVCC througha pullup
resistor; the valueof the resistoris determined the current-sinking capabilityof the driver.
Active bus-hold circuitryis providedto hold unusedor data inputsata valid logic level.
The SN74LVC16374is characterized for operation fromto 85°C.
