SN74LV594APWR ,8-Bit Shift Registers With Output Registers SCLS413J–APRIL 2005–REVISED MARCH 20155 Pin Configuration and FunctionsD, DB, or PW Package16-Pin ..
SN74LV594APWTG4 ,8-Bit Shift Registers With Output Registers 16-TSSOP -40 to 125Features 3 DescriptionThe SN74LV594A devices are 8-bit shift registers1• 2-V to 5.5-V V OperationCC ..
SN74LV595AD ,8-Bit Shift Registers With 3-State Output Registers SCLS414Q–APRIL 1998–REVISED APRIL 20165 Pin Configuration and FunctionsRGY Package TSSOP Package16 ..
SN74LV595APWR ,8-Bit Shift Registers With 3-State Output RegistersElectrical Characteristics....... 611.1 Layout Guidelines.... 166.6 Timing Requirements, V = 2.5 V ..
SN74LV595APWT ,8-Bit Shift Registers With 3-State Output RegistersMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
SN74LV595AQPWRQ1 ,Automotive Catalog 8-Bit Shift Registers With 3-State Output Registers 16-TSSOP -40 to 125FEATURES• Qualified for Automotive Applications Q VB 1 16 CCQ Q2 15• Customer-Specific Configuratio ..
SP3243EHCA , High Speed Intelligent 3.0V to 5.5V RS-232 Transceivers
SP3243EHCA , High Speed Intelligent 3.0V to 5.5V RS-232 Transceivers
SP3243EHCA , High Speed Intelligent 3.0V to 5.5V RS-232 Transceivers
SP3243EHCA , High Speed Intelligent 3.0V to 5.5V RS-232 Transceivers
SP3243EUCT-L , 3 Driver/5 Receiver Intelligent 3.0V to 5.5V RS-232 Transceivers
SP3243EUCT-L , 3 Driver/5 Receiver Intelligent 3.0V to 5.5V RS-232 Transceivers
SN74LV594APW-SN74LV594APWG4-SN74LV594APWR-SN74LV594APWTG4
8-Bit Shift Registers With Output Registers
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SN54LV594A, SN74LV594ASCLS413J –APRIL 2005–REVISED MARCH 2015
SNx4LV594A 8-Bit Shift Registers With Output Registers Features 3 DescriptionThe SN74LV594A devices are 8-bit shift registers 2-Vto 5.5-V VCC Operation designed for 2-Vto 5.5-V VCC operation.• Maximum tpdof 6.5nsat5V Typical VOLP (Output Ground Bounce) <0.8Vat
Device Information(1)VCC= 3.3V, TA= 25°C Support Mixed-Mode Voltage Operationon All
Ports 8-Bit Serial-In, Parallel-Out Shift Registers With
Storage (1) Forall available packages, see the orderable addendumat• Independent Direct Overriding Clearson Shift and the endofthe data sheet.
Storage Registers
Logic Diagram (Positive Logic)• Independent Clocks for Shift and Storage
Registers Latch-up Performance Exceeds 100 mA Per
JESD 78, ClassII ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 1000-V Charged-Device Model (C101)
Applications ECG Electrocardiograms Storage Servers EPOS, ECR, and Cash Drawers Servers and High-Performance Computing