SN74LV367ANSR ,Hex Buffers And Line Drivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74LV373 ,Octal Transparent D-Type Latch With 3-State Output 20-SSOP -40 to 85
SN74LV373A ,Octal Transparent D-Type Latches With 3-State OutputsElectrical Characteristics....... 711.1 Layout Guidelines.... 146.6 Timing Requirements, V = 2.5 V ..
SN74LV373ADW ,Octal Transparent D-Type Latches With 3-State OutputsElectrical Characteristics........ 7OL OL OL• Deleted Related Links section....... 15• Added Receiv ..
SN74LV373ADWR ,Octal Transparent D-Type Latches With 3-State OutputsSample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareSN74LV373ASCLS407L–A ..
SN74LV373AGQNR ,Octal Transparent D-Type Latches With 3-State OutputsMaximum Ratings.. 59.1 Application Information........ 126.2 ESD Ratings ...... 59.2 Typical Applic ..
SP3232EBEY , True 3.0V to 5.5V RS-232 Transceivers
SP3232EBEY , True 3.0V to 5.5V RS-232 Transceivers
SP3232ECA-L , True 3.0V to 5.5V RS-232 Transceivers
SP3232ECP , True 3.0V to 5.5V RS-232 Transceivers
SP3232ECP , True 3.0V to 5.5V RS-232 Transceivers
SP3232EEA , True 3.0V to 5.5V RS-232 Transceivers
SN74LV367ADBR-SN74LV367ANSR
Hex Buffers And Line Drivers With 3-State Outputs
Typical VOHV (Output VOH Undershoot)>2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on
All Ports Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering informationThe ’LV367A devices are hex buffers and line
drivers designed for 2-V to 5.5-V VCC operation.
These devices are designed specifically to
improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
The ’LV367A devices are organized as dual 4-line
and 2-line buffers/drivers with active-low
output-enable (1OE and 2OE) inputs. When OE is
low, the device passes noninverted data from the
A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
