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SN74LS323N
8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS
8-BIT SHIFT/STORAGE REGISTER
WITH 3-ST ATE OUTPUTSThe SN54/74LS323 is an 8-Bit Universal Shift/Storage Register with
3-state outputs. Its function is similar to the SN54/74LS299 with the exception
of Synchronous Reset. Parallel load inputs and flip-flop outputs are
multiplexed to minimize pin count. Separate inputs and outputs are provided
for flip-flops Q0 and Q7 to allow easy cascading.
Four operation modes are possible: hold (store), shift left, shift right, and
parallel load. All modes are activated on the LOW-to-HIGH transition of the
Clock. Common I/O for Reduced Pin Count Four Operation Modes: Shift Left, Shift Right, Parallel Load and Store Separate Continuous Inputs and Outputs from Q0 and Q7 Allow Easy
Cascading Fully Synchronous Reset 3-State Outputs for Bus Oriented Applications Input Clamp Diodes Limit High-Speed Termination Effects ESD > 3500 Volts
CONNECTION DIAGRAM DIP (TOP VIEW)NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
VCC DS7 Q7 I/O7 I/O3I/O5 I/O1
OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 GND DS0
PIN NAMES LOADING (Note a) Clock Pulse (active positive going edge) Input
DS0 Serial Data Input for Right Shift
DS7 Serial Data Input for Left Shift
I/On Parallel Data Input or
Parallel Output (3-State) (Note c)
OE1, OE2 3-State Output Enable (active LOW) Inputs
Q0, Q7
S0, S1
Serial Outputs (Note b)
Mode Select Inputs Synchronous Reset (active LOW) Input
NOTES:
a) 1 TTL LOAD = 40 μA HIGH/1.6 mA LOW.
