SN74LS273DWR ,Octal D-Type Flip-Flops With Clear SN54273, SN54LS273, SN74273, SN74LS273 OCTAL D-TYPE FLIP-FLOP WITH CLEAR SDLS090 – OCTOBER 1976 – ..
SN74LS273DWR ,Octal D-Type Flip-Flops With Clearlogic diagram (positive logic)1D 2D 3D 4D 5D 6D 7D 8D11 34 7 8 13 14 17 18CLOCK1D 1D 1D 1D 1D 1D 1D ..
SN74LS273DWR2 ,Octal D Flip-Flop with ClearFUNCTIONAL DESCRIPTIONThe SN74LS273 is an 8-Bit Parallel Register with a setup and hold time requir ..
SN74LS273J ,Octal D-Type Flip-Flops With Clearmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage, V ..
SN74LS273M ,Octal D Flip-Flop with Clear3SN74LS273AC WAVEFORMS1/f maxtWtMRW1.3 VCP 1.3 V 1.3 V t1.3 V 1.3 Vrec1.3 Vt (H) t (L)s s CPt (H) t ..
SN74LS273N ,OCTAL D FLIP-FLOP WITH CLEARSN54/74LS273OCTAL D FLIP-FLOP WITH CLEARThe SN54/ 74LS273 is a high-speed 8-Bit Register. The regis ..
SP0102NC3-2 , surface mounted via standard solder reflow equipment
SP0102NC3-2 , surface mounted via standard solder reflow equipment
SP0103NC3-2 , SP0103 Series with Integrated Amplifier
SP0103NC3-2 , SP0103 Series with Integrated Amplifier
SP0103NC3-2 , SP0103 Series with Integrated Amplifier
SP0204LE5 , “Zero Height” SiSonic™ Microphone Specification
SN74LS273-SN74LS273DW-SN74LS273DWR-SN74LS273J-SN74LS273NSR
Octal D-Type Flip-Flops With Clear 20-SOIC 0 to 70
CLK
CLR
logic symbol† This symbol is in accordance with ANSI/IEEE Std.
91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, N, and W packages.
Applications Include:
Buffer/Storage Registers
Shift Registers
Pattern Generators
descriptionThese monolithic, positive-edge-triggered flip-
flops utilize TTL circuitry to implement D-type
flip-flop logic with a direct clear input.
Information at the D inputs meeting the setup time
requirements is transferred to the Q outputs on the
positive-going edge of the clock pulse. Clock
triggering occurs at a particular voltage level and
is not directly related to the transition time of the
positive-going pulse. When the clock input is at
either the high or low level, the D input signal has
no effect ar the output.
These flip-flops are guaranteed to respond to
clock frequencies ranging form 0 to 30 megahertz
while maximum clock frequency is typically 40
megahertz. Typical power dissipation is 39
milliwatts per flip-flop for the ′273 and 10 milliwatts
for the ′LS273.
FUNCTION TABLE
(each flip-flop)
SN54LS273... FK PACKAGE
(TOP VIEW)GND
CLK1QCLR
GND
CLK
