SN74LS163AMR1 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS163AN ,BCD decade counter/4-bit binary counterSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS163ANSR ,Synchronous 4-Bit Binary Counters
SN74LS163N ,BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS163N ,BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS164 ,Serial-In Parallel-Out Shift Register”SN54164, sit5iu.s1isiii7ii1tiii," SN74LS1648-BIT PARALLEl-OUT SERIAL SHIFT REGISTERSMARCH 1974 - R ..
SO-20LD , SMT-Precision-R-Networks
SO642 ,SMALL SIGNAL NPN TRANSISTORSO642®SMALL SIGNAL NPN TRANSISTORPRELIMINARY DATAType MarkingSO642 N91■ SILICON EPITAXIAL PLANAR NP ..
SOC100A , THIN FILM COMPENSATED SENSORS
SOC100A , THIN FILM COMPENSATED SENSORS
SOC100A , THIN FILM COMPENSATED SENSORS
SOD4002 ,Conductor Holdings Limited - PLASTIC SILICON RECTIFIER
SN74LS161ADR2-SN74LS161AML1-SN74LS161AMR1-SN74LS163AMR1
BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERS
BCD DECADE COUNTERS/
4-BIT BINARY COUNTERSThe LS160A/161A/162A/163A are high-speed 4-bit synchronous count-
ers. They are edge-triggered, synchronously presettable, and cascadable
MSI building blocks for counting, memory addressing, frequency division and
other applications. The LS160A and LS162A count modulo 10 (BCD). The
LS161A and LS163A count modulo 16 (binary.)
The LS160A and LS161A have an asynchronous Master Reset (Clear)
input that overrides, and is independent of, the clock and all other control
inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input that
overrides all other control inputs, but is active only during the rising clock
edge. Synchronous Counting and Loading Two Count Enable Inputs for High Speed Synchronous Expansion Terminal Count Fully Decoded Edge-Triggered Operation Typical Count Rate of 35 MHz ESD > 3500 Volts
CONNECTION DIAGRAM DIP (TOP VIEW)NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
VCC Q0 Q1 Q2 CETQ3 PE P0 P1 P2 P3 CEP GND
*MR for LS160A and LS161A
*SR for LS162A and LS163A
PIN NAMES LOADING (Note a)P0–P3
CEP
CET
Q0–Q3
Parallel Enable (Active LOW) Input
Parallel Inputs
Count Enable Parallel Input
Count Enable Trickle Input
Clock (Active HIGH Going Edge) Input
Master Reset (Active LOW) Input
Synchronous Reset (Active LOW) Input
Parallel Outputs (Note b)
Terminal Count Output (Note b)
NOTES: 1 TTL Unit Load (U.L.) = 40 μA HIGH/1.6 mA LOW. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
